From: Baolu Lu <baolu.lu@linux.intel.com>
To: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: baolu.lu@linux.intel.com, "Zhang, Tina" <tina.zhang@intel.com>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
"Tian, Kevin" <kevin.tian@intel.com>,
Nicolin Chen <nicolinc@nvidia.com>,
Michael Shavit <mshavit@google.com>,
Vasant Hegde <vasant.hegde@amd.com>,
Jason Gunthorpe <jgg@nvidia.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Hao Fang <fanghao11@huawei.com>
Subject: Re: [PATCH v10 5/6] iommu: Support mm PASID 1:n with sva domains
Date: Wed, 21 Feb 2024 11:52:48 +0800 [thread overview]
Message-ID: <55a4b5e5-e0ad-4aa4-a29b-5fff4ef69063@linux.intel.com> (raw)
In-Reply-To: <CABQgh9FFpL=mEZ-7PqRRVg1eniYV176B7USbGP5MLPvhJaGo9A@mail.gmail.com>
On 2024/2/21 10:45, Zhangfei Gao wrote:
> On Wed, 21 Feb 2024 at 10:06, Baolu Lu<baolu.lu@linux.intel.com>
> wrote:
>> On 2024/2/21 9:28, Zhangfei Gao wrote:
>>> On Wed, 21 Feb 2024 at 07:58, Zhang, Tina<tina.zhang@intel.com>
>>> wrote:
>>>
>>>>>> struct iommu_sva *iommu_sva_bind_device(struct device
>>>>>> *dev, struct mm_struct *mm) { + struct
>>>>>> iommu_mm_data *iommu_mm; struct iommu_domain *domain;
>>>>>> struct iommu_sva *handle; int ret;
>>>>>>
>>>>>> + mutex_lock(&iommu_sva_lock); + /* Allocate
>>>>>> mm->pasid if necessary. */ - ret =
>>>>>> iommu_sva_alloc_pasid(mm, dev); - if (ret) - return
>>>>>> ERR_PTR(ret); + iommu_mm = iommu_alloc_mm_data(mm,
>>>>>> dev); + if (IS_ERR(iommu_mm)) { + ret =
>>>>>> PTR_ERR(iommu_mm); + goto out_unlock; + }
>>>>>>
>>>>>> handle = kzalloc(sizeof(*handle), GFP_KERNEL); - if
>>>>>> (!handle) - return ERR_PTR(-ENOMEM); - -
>>>>>> mutex_lock(&iommu_sva_lock); - /* Search for an
>>>>>> existing domain. */ - domain =
>>>>>> iommu_get_domain_for_dev_pasid(dev, mm->pasid, -
>>>>>> IOMMU_DOMAIN_SVA); - if (IS_ERR(domain)) { - ret =
>>>>>> PTR_ERR(domain); + if (!handle) { + ret = -ENOMEM;
>>>>>> goto out_unlock; }
>>>>>>
>>>>>> - if (domain) { - domain->users++; -
>>>>>> goto out;
>>>>> Our multi bind test case broke since 6.8-rc1. The test case
>>>>> can use same domain & pasid, return different handle, 6.7
>>>>> simply domain->users ++ and return.
>>>>>
>>>>>> + /* Search for an existing domain. */ +
>>>>>> list_for_each_entry(domain, &mm->iommu_mm->sva_domains,
>>>>>> next)
>>>>> {
>>>>>> + ret = iommu_attach_device_pasid(domain,
>>>>>> dev, + iommu_mm->pasid);
>>>>> Now iommu_attach_device_pasid return BUSY since the same
>>>>> pasid. And then iommu_sva_bind_device attach ret=-16
>>>> Sounds like the test case tries to bind a device to a same mm
>>>> multiple times without unbinding the device and the
>>>> expectation is that it can always return a valid handle to pass
>>>> the test. Right?
>>> Yes
>>>
>>> The device can bind to the same mm multi-times and return
>>> different handle, Since the refcount, no need to unbind and bind
>>> sequently, The unbind can happen later with the handle.
>> Is there any real use case to bind an mm to the pasid of a device
>> multiple times? If there are cases, is it better to handle this in
>> the uacce driver?
> Yes, it is required for multi-thread, the device can provide
> multi-queue to speed up.
>
>> From iommu core's perspective, it doesn't make sense to attach the
>> same domain to the same device (or pasid) multiple times.
> But is it the refcount domain->user++ used for? Is there any reason
> not doing this.
I was just thinking about whether to do this in the iommu core, or in
the upper layers, like uacce or iommufd. It seems that there is no need
to attach a domain to a device or pasid again if it has already been
attached.
Best regards,
baolu
next prev parent reply other threads:[~2024-02-21 3:52 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-27 0:05 [PATCH v10 0/6] Share sva domains with all devices bound to a mm Tina Zhang
2023-10-27 0:05 ` [PATCH v10 1/6] iommu: Change kconfig around IOMMU_SVA Tina Zhang
2023-10-27 7:12 ` Joerg Roedel
2023-10-27 7:36 ` Zhang, Tina
2023-10-27 9:14 ` Zhang, Tina
2023-10-27 11:20 ` Jason Gunthorpe
2023-11-27 18:24 ` Jason Gunthorpe
2023-11-28 0:23 ` Zhang, Tina
2023-10-27 0:05 ` [PATCH v10 2/6] iommu/vt-d: Remove mm->pasid in intel_sva_bind_mm() Tina Zhang
2023-10-27 0:05 ` [PATCH v10 3/6] iommu: Add mm_get_enqcmd_pasid() helper function Tina Zhang
2023-10-27 0:05 ` [PATCH v10 4/6] mm: Add structure to keep sva information Tina Zhang
2023-10-27 0:05 ` [PATCH v10 5/6] iommu: Support mm PASID 1:n with sva domains Tina Zhang
2024-02-20 16:26 ` Zhangfei Gao
2024-02-20 23:58 ` Zhang, Tina
2024-02-21 1:28 ` Zhangfei Gao
2024-02-21 1:53 ` Zhangfei Gao
2024-02-21 2:06 ` Baolu Lu
2024-02-21 2:45 ` Zhangfei Gao
2024-02-21 3:52 ` Baolu Lu [this message]
2024-02-21 6:26 ` Zhangfei Gao
2024-02-21 7:41 ` Zhang, Tina
2024-02-21 8:01 ` Zhangfei Gao
2023-10-27 0:05 ` [PATCH v10 6/6] mm: Deprecate pasid field Tina Zhang
2023-12-12 9:12 ` [PATCH v10 0/6] Share sva domains with all devices bound to a mm Joerg Roedel
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