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Wed, 20 Nov 2019 09:48:52 -0800 (PST) Received: from [10.83.36.153] ([217.173.96.166]) by smtp.gmail.com with ESMTPSA id t14sm31266663wrw.87.2019.11.20.09.48.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 20 Nov 2019 09:48:51 -0800 (PST) Subject: Re: [PATCH] Ensure pci transactions coming from PLX NTB are handled when IOMMU is turned on To: James Sewart , iommu@lists.linux-foundation.org References: <0B8FAD0D-B598-4CEA-A614-67F4C7C5B9CA@arista.com> From: Dmitry Safonov <0x7f454c46@gmail.com> Message-ID: <5c3b56dd-7088-e544-6628-01506f7b84e8@gmail.com> Date: Wed, 20 Nov 2019 17:48:45 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: <0B8FAD0D-B598-4CEA-A614-67F4C7C5B9CA@arista.com> Content-Language: en-US Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, Logan Gunthorpe , linux-kernel@vger.kernel.org, Dmitry Safonov X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" +Cc: linux-pci@vger.kernel.org +Cc: Bjorn Helgaas +Cc: Logan Gunthorpe On 11/5/19 12:17 PM, James Sewart wrote: > Any comments on this? > > Cheers, > James. > >> On 24 Oct 2019, at 13:52, James Sewart wrote: >> >> The PLX PEX NTB forwards DMA transactions using Requester ID's that don't exist as >> PCI devices. The devfn for a transaction is used as an index into a lookup table >> storing the origin of a transaction on the other side of the bridge. >> >> This patch aliases all possible devfn's to the NTB device so that any transaction >> coming in is governed by the mappings for the NTB. >> >> Signed-Off-By: James Sewart >> --- >> drivers/pci/quirks.c | 22 ++++++++++++++++++++++ >> 1 file changed, 22 insertions(+) >> >> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c >> index 320255e5e8f8..647f546e427f 100644 >> --- a/drivers/pci/quirks.c >> +++ b/drivers/pci/quirks.c >> @@ -5315,6 +5315,28 @@ SWITCHTEC_QUIRK(0x8574); /* PFXI 64XG3 */ >> SWITCHTEC_QUIRK(0x8575); /* PFXI 80XG3 */ >> SWITCHTEC_QUIRK(0x8576); /* PFXI 96XG3 */ >> >> +/* >> + * PLX NTB uses devfn proxy IDs to move TLPs between NT endpoints. These IDs >> + * are used to forward responses to the originator on the other side of the >> + * NTB. Alias all possible IDs to the NTB to permit access when the IOMMU is >> + * turned on. >> + */ >> +static void quirk_PLX_NTB_dma_alias(struct pci_dev *pdev) >> +{ >> + if (!pdev->dma_alias_mask) >> + pdev->dma_alias_mask = kcalloc(BITS_TO_LONGS(U8_MAX), >> + sizeof(long), GFP_KERNEL); >> + if (!pdev->dma_alias_mask) { >> + dev_warn(&pdev->dev, "Unable to allocate DMA alias mask\n"); >> + return; >> + } >> + >> + // PLX NTB may use all 256 devfns >> + memset(pdev->dma_alias_mask, U8_MAX, (U8_MAX+1)/BITS_PER_BYTE); >> +} >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x87b0, quirk_PLX_NTB_dma_alias); >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x87b1, quirk_PLX_NTB_dma_alias); >> + >> /* >> * On Lenovo Thinkpad P50 SKUs with a Nvidia Quadro M1000M, the BIOS does >> * not always reset the secondary Nvidia GPU between reboots if the system >> -- >> 2.19.1 >> >> > Thanks, Dmitry _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu