From: Vasant Hegde <vasant.hegde@amd.com>
To: Jerry Snitselaar <jsnitsel@redhat.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
suravee.suthikulpanit@amd.com, joao.m.martins@oracle.com,
Alexey Kardashevskiy <aik@amd.com>
Subject: Re: [PATCH 2/2] iommu/amd: Enable separate interrupt for PPR and GA log
Date: Mon, 19 Jun 2023 15:46:25 +0530 [thread overview]
Message-ID: <60549886-795b-a7dd-0311-699df7ac4b56@amd.com> (raw)
In-Reply-To: <6efnbi2x5stp6npyx54ced2uykwq2nvx6qs2ldgboru4bi4dwm@zivxbrdtnxoy>
Jerry,
On 6/14/2023 10:48 PM, Jerry Snitselaar wrote:
> On Fri, Jun 09, 2023 at 10:20:25AM +0000, Vasant Hegde wrote:
>> AMD IOMMU supports separate interrupt for event, ppr and ga log. It has
>> separate interrupt control register for same. So far we were using
>> single interrupt to handle all three interrupts.
>>
>> Add separate interrupt for event, ppr and ga log. `hwirq` is
>> set to INTCAPXT register offset. We will use hwirq to [un]mask irqs.
>>
>> Also add support for irq naming. It will display proper name for irq
>> (AMD-Vi<X>-[Evt/PPR/GA]) instead of generic name (AMD-Vi).
>>
>> Note that this patch changes interrupt handling only in IOMMU x2apic mode
>> (MMIO 0x18[IntCapXTEn]=1). In legacy mode it will continue to use single
>> MSI interrupt.
>>
>> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
>> Reviewed-by: Alexey Kardashevskiy <aik@amd.com>
>> ---
>> drivers/iommu/amd/amd_iommu_types.h | 9 ++++++
>> drivers/iommu/amd/init.c | 48 +++++++++++++++++++++--------
>> 2 files changed, 45 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
>> index a993e1bdb70b..65e18b590a54 100644
>> --- a/drivers/iommu/amd/amd_iommu_types.h
>> +++ b/drivers/iommu/amd/amd_iommu_types.h
>> @@ -704,12 +704,21 @@ struct amd_iommu {
>> /* event buffer virtual address */
>> u8 *evt_buf;
.../...
>> +static int iommu_setup_intcapxt(struct amd_iommu *iommu)
>> +{
>> + int ret;
>> +
>> + snprintf(iommu->evt_irq_name, sizeof(iommu->evt_irq_name),
>> + "AMD-Vi%d-Evt", iommu->index);
>> + ret = __iommu_setup_intcapxt(iommu, iommu->evt_irq_name,
>> + MMIO_INTCAPXT_EVT_OFFSET,
>> + amd_iommu_int_thread_evtlog);
>> + if (ret)
>> + return ret;
>> +
>> + snprintf(iommu->ppr_irq_name, sizeof(iommu->ppr_irq_name),
>> + "AMD-Vi%d-PPR", iommu->index);
>> + ret = __iommu_setup_intcapxt(iommu, iommu->ppr_irq_name,
>> + MMIO_INTCAPXT_PPR_OFFSET,
>> + amd_iommu_int_thread_pprlog);
>> + if (ret)
>> + return ret;
>> +
>> + snprintf(iommu->ga_irq_name, sizeof(iommu->ga_irq_name),
>> + "AMD-Vi%d-GA", iommu->index);
>> + ret = __iommu_setup_intcapxt(iommu, iommu->ga_irq_name,
>> + MMIO_INTCAPXT_GALOG_OFFSET,
>> + amd_iommu_int_thread_galog);
>> +
>
> Related to the question with the first patch, should this only
> get set up if CONFIG_IRQ_REMAP is enabled?
Ack. Will fix it in v2.
Thanks
-Vasant
prev parent reply other threads:[~2023-06-19 10:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-09 10:20 [PATCH 0/2] iommu/amd: Interrupt handling improvements Vasant Hegde
2023-06-09 10:20 ` [PATCH 1/2] iommu/amd: Add separate interrupt handler for PPR and GA log Vasant Hegde
2023-06-13 21:38 ` Jerry Snitselaar
2023-06-14 8:59 ` Vasant Hegde
2023-06-20 15:01 ` Joao Martins
2023-06-20 16:16 ` Vasant Hegde
2023-06-09 10:20 ` [PATCH 2/2] iommu/amd: Enable separate interrupt " Vasant Hegde
2023-06-14 17:18 ` Jerry Snitselaar
2023-06-19 10:16 ` Vasant Hegde [this message]
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