From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: "Tian, Kevin" <kevin.tian@intel.com>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"nicolinc@nvidia.com" <nicolinc@nvidia.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"robin.murphy@arm.com" <robin.murphy@arm.com>,
"will@kernel.org" <will@kernel.org>,
"joro@8bytes.org" <joro@8bytes.org>,
"jsnitsel@redhat.com" <jsnitsel@redhat.com>,
"vasant.hegde@amd.com" <vasant.hegde@amd.com>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
"santosh.shukla@amd.com" <santosh.shukla@amd.com>,
"sairaj.arunkodilkar@amd.com" <sairaj.arunkodilkar@amd.com>,
"jon.grimm@amd.com" <jon.grimm@amd.com>,
"Prakash, Prashanth" <prashanthpra@google.com>,
"wvw@google.com" <wvw@google.com>,
"wnliu@google.com" <wnliu@google.com>,
"gptran@google.com" <gptran@google.com>,
"kpsingh@google.com" <kpsingh@google.com>
Subject: Re: [PATCH v5] iommu/amd: Add support for hw_info for iommu capability query
Date: Tue, 21 Oct 2025 09:35:16 -0500 [thread overview]
Message-ID: <62bb3eee-588a-40eb-a2c7-739166ac774e@amd.com> (raw)
In-Reply-To: <BN9PR11MB5276E624B7CD6E1D6BA1E12B8CE9A@BN9PR11MB5276.namprd11.prod.outlook.com>
On 10/16/2025 2:40 AM, Tian, Kevin wrote:
>> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
>> Sent: Friday, September 26, 2025 10:19 PM
>>
>> +/**
>> + * struct iommu_hw_info_amd - AMD IOMMU device info
>> + *
>> + * @efr : Value of AMD IOMMU Extended Feature Register (EFR)
>> + * @efr2: Value of AMD IOMMU Extended Feature 2 Register (EFR2)
>> + *
>> + * Please See description of these registers in the following sections of
>> + * the AMD I/O Virtualization Technology (IOMMU) Specification.
>> + * (https://docs.amd.com/v/u/en-US/48882_3.10_PUB)
>> + *
>> + * - MMIO Offset 0030h IOMMU Extended Feature Register
>> + * - MMIO Offset 01A0h IOMMU Extended Feature 2 Register
>> + *
>> + * Note: The EFR and EFR2 are raw values reported by hardware.
>> + * VMM is responsible to determine the appropriate flags to be exposed to
>> + * the VM since cetertain features are not currently supported by the kernel
>> + * for HW-vIOMMU.
>
> this hw_info api should work even w/o HW-vIOMMU?
My understanding is the hw_info API is independent of HW-vIOMMU support.
It mainly exposes vendor-specific HW capabilities.
Suravee>
> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
prev parent reply other threads:[~2025-10-21 14:35 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-26 14:19 [PATCH v5] iommu/amd: Add support for hw_info for iommu capability query Suravee Suthikulpanit
2025-10-16 7:40 ` Tian, Kevin
2025-10-21 14:35 ` Suthikulpanit, Suravee [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=62bb3eee-588a-40eb-a2c7-739166ac774e@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=gptran@google.com \
--cc=iommu@lists.linux.dev \
--cc=jgg@nvidia.com \
--cc=jon.grimm@amd.com \
--cc=joro@8bytes.org \
--cc=jsnitsel@redhat.com \
--cc=kevin.tian@intel.com \
--cc=kpsingh@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=nicolinc@nvidia.com \
--cc=prashanthpra@google.com \
--cc=robin.murphy@arm.com \
--cc=sairaj.arunkodilkar@amd.com \
--cc=santosh.shukla@amd.com \
--cc=vasant.hegde@amd.com \
--cc=will@kernel.org \
--cc=wnliu@google.com \
--cc=wvw@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox