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Mon, 10 Feb 2025 11:31:40 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51ABVdQB028977 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Feb 2025 11:31:39 GMT Received: from [10.216.18.35] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 10 Feb 2025 03:31:35 -0800 Message-ID: <6ddda82b-d90c-4f16-a1e5-1a63fca7aba2@quicinc.com> Date: Mon, 10 Feb 2025 17:01:26 +0530 Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add device node for gfx_smmu To: Dmitry Baryshkov CC: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , , , , , References: <20250203-b4-branch-gfx-smmu-v4-0-eaa7aa762f48@quicinc.com> <20250203-b4-branch-gfx-smmu-v4-2-eaa7aa762f48@quicinc.com> <464vbzwgv44fn4iw5vj5yzpstzhcsb7rzuedf4fwl23hmdhews@d4q33ro6hxq3> Content-Language: en-US From: Pratyush Brahma In-Reply-To: <464vbzwgv44fn4iw5vj5yzpstzhcsb7rzuedf4fwl23hmdhews@d4q33ro6hxq3> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 1FNwXa16gvd1MBf64JJ-2x1HySUAS9rq X-Proofpoint-GUID: 1FNwXa16gvd1MBf64JJ-2x1HySUAS9rq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-10_06,2025-02-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 mlxlogscore=946 phishscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 mlxscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502100097 On 2/10/2025 4:31 PM, Dmitry Baryshkov wrote: > On Mon, Feb 03, 2025 at 11:17:02AM +0530, Pratyush Brahma wrote: >> Add the device node for gfx smmu that is required for gpu >> specific address translations. >> >> Signed-off-by: Pratyush Brahma >> --- >> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 39 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 39 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> index 4a057f7c0d9fae0ebd1b3cf3468746b382bc886b..7a8211bec139375b5aab939f123d88fca7aceff2 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> @@ -2674,6 +2674,45 @@ gpucc: clock-controller@3d90000 { >> #power-domain-cells = <1>; >> }; >> >> + adreno_smmu: iommu@3da0000 { >> + compatible = "qcom,qcs8300-smmu-500", "qcom,adreno-smmu", >> + "qcom,smmu-500", "arm,mmu-500"; >> + reg = <0x0 0x3da0000 0x0 0x20000>; >> + #iommu-cells = <2>; >> + #global-interrupts = <2>; >> + >> + interrupts = , >> + , >> + , >> + , >> + , >> + , >> + , >> + , >> + , >> + , >> + , >> + ; >> + >> + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, >> + <&gpucc GPU_CC_HUB_CX_INT_CLK>, >> + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, >> + <&gcc GCC_GPU_MEMNOC_GFX_CLK>, >> + <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, >> + <&gpucc GPU_CC_AHB_CLK>, >> + <&gpucc GPU_CC_HUB_AON_CLK>; >> + >> + clock-names = "gcc_gpu_memnoc_gfx_clk", > Stray whitespace after the Tab symbol > >> + "gcc_gpu_snoc_dvm_gfx_clk", >> + "gpu_cc_ahb_clk", >> + "gpu_cc_hlos1_vote_gpu_smmu_clk", >> + "gpu_cc_cx_gmu_clk", >> + "gpu_cc_hub_cx_int_clk", >> + "gpu_cc_hub_aon_clk"; > clocks and clock-names do not match. > >> + power-domains = <&gpucc GPU_CC_CX_GDSC>; >> + dma-coherent; >> + }; >> + >> pmu@9091000 { >> compatible = "qcom,qcs8300-llcc-bwmon", "qcom,sc7280-llcc-bwmon"; >> reg = <0x0 0x9091000 0x0 0x1000>; >> >> -- >> 2.34.1 >> Thanks for checking. Will address these in next version. -- Thanks and Regards Pratyush Brahma