From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED1AC185C; Mon, 14 Aug 2023 06:32:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1691994777; x=1723530777; h=message-id:date:mime-version:cc:subject:to:references: from:in-reply-to:content-transfer-encoding; bh=8GKcCJfcJUphTqzm0WnLK4Rn40GEWwQ/J1t9r2W/Lgo=; b=RWG4qsHZd7xuokNB49Um2IDL3bNB1qo5709R6OEf4oHv4D8WCd7lzNFc OS7eFInQ8XjgMV8Fn7rMoj6bgqXOOyFC+SDjk2P1Lv708+apHotPVG1XC lcH+5brspPCKBs3B56fy0VPpkgSCsvQBmguZZTbLBlJmEn4y2c4ArBrWs +6EDzOriHdvgjJ00Vk6LfZRHPWowfKlDboIPX03vCsQLYpJn9gWXDvaQb fz+ESJmohZtA4iTQ6sNLEI/H8A0DgaPOqFnLKKfsPjpJH6V4A+HyC3ctS p/I6Hp4h6soeOHWteZvKmUvZOL0KZ6ZL1WTK0icFQ2SaJ4zPLphiPa1G2 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10801"; a="371976488" X-IronPort-AV: E=Sophos;i="6.01,171,1684825200"; d="scan'208";a="371976488" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Aug 2023 23:32:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10801"; a="823332925" X-IronPort-AV: E=Sophos;i="6.01,171,1684825200"; d="scan'208";a="823332925" Received: from wentaox1-mobl.ccr.corp.intel.com (HELO [10.254.215.205]) ([10.254.215.205]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Aug 2023 23:32:36 -0700 Message-ID: <8cef9a0d-15ba-f8af-7e22-d4d3063c97bf@linux.intel.com> Date: Mon, 14 Aug 2023 14:32:33 +0800 Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.14.0 Cc: baolu.lu@linux.intel.com, Dmitry Osipenko , Marek Szyprowski , Nicolin Chen , Niklas Schnelle , Steven Price , Thierry Reding Subject: Re: [PATCH v6 17/25] iommu/qcom_iommu: Add an IOMMU_IDENTITIY_DOMAIN Content-Language: en-US To: Jason Gunthorpe , Andy Gross , Alim Akhtar , Bjorn Andersson , AngeloGioacchino Del Regno , Baolin Wang , Christophe Leroy , Gerald Schaefer , Heiko Stuebner , iommu@lists.linux.dev, Jernej Skrabec , Jonathan Hunter , Joerg Roedel , Kevin Tian , Konrad Dybcio , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-s390@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, Russell King , linuxppc-dev@lists.ozlabs.org, Matthias Brugger , Matthew Rosato , Michael Ellerman , Nicholas Piggin , Orson Zhai , Rob Clark , Robin Murphy , Samuel Holland , Thierry Reding , Krishna Reddy , Chen-Yu Tsai , Will Deacon , Yong Wu , Chunyan Zhang References: <17-v6-e8114faedade+425-iommu_all_defdom_jgg@nvidia.com> From: Baolu Lu In-Reply-To: <17-v6-e8114faedade+425-iommu_all_defdom_jgg@nvidia.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 2023/8/3 8:08, Jason Gunthorpe wrote: > This brings back the ops->detach_dev() code that commit > 1b932ceddd19 ("iommu: Remove detach_dev callbacks") deleted and turns it > into an IDENTITY domain. > > Signed-off-by: Jason Gunthorpe > --- > drivers/iommu/arm/arm-smmu/qcom_iommu.c | 39 +++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c > index a503ed758ec302..9d7b9d8b4386d4 100644 > --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c > +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c > @@ -387,6 +387,44 @@ static int qcom_iommu_attach_dev(struct iommu_domain *domain, struct device *dev > return 0; > } > > +static int qcom_iommu_identity_attach(struct iommu_domain *identity_domain, > + struct device *dev) > +{ > + struct iommu_domain *domain = iommu_get_domain_for_dev(dev); > + struct qcom_iommu_domain *qcom_domain; > + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); > + struct qcom_iommu_dev *qcom_iommu = to_iommu(dev); > + unsigned int i; > + > + if (domain == identity_domain || !domain) > + return 0; > + > + qcom_domain = to_qcom_iommu_domain(domain); > + if (WARN_ON(!qcom_domain->iommu)) > + return -EINVAL; > + > + pm_runtime_get_sync(qcom_iommu->dev); > + for (i = 0; i < fwspec->num_ids; i++) { > + struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]); > + > + /* Disable the context bank: */ > + iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0); > + > + ctx->domain = NULL; Does setting ctx->domain to NULL still match this semantics? > + } > + pm_runtime_put_sync(qcom_iommu->dev); > + return 0; > +} > + > +static struct iommu_domain_ops qcom_iommu_identity_ops = { > + .attach_dev = qcom_iommu_identity_attach, > +}; > + > +static struct iommu_domain qcom_iommu_identity_domain = { > + .type = IOMMU_DOMAIN_IDENTITY, > + .ops = &qcom_iommu_identity_ops, > +}; > + > static int qcom_iommu_map(struct iommu_domain *domain, unsigned long iova, > phys_addr_t paddr, size_t pgsize, size_t pgcount, > int prot, gfp_t gfp, size_t *mapped) > @@ -553,6 +591,7 @@ static int qcom_iommu_of_xlate(struct device *dev, struct of_phandle_args *args) > } > > static const struct iommu_ops qcom_iommu_ops = { > + .identity_domain = &qcom_iommu_identity_domain, > .capable = qcom_iommu_capable, > .domain_alloc = qcom_iommu_domain_alloc, > .probe_device = qcom_iommu_probe_device, Anyway, Reviewed-by: Lu Baolu Best regards, baolu