From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E827E62E for ; Tue, 30 Aug 2022 07:45:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661845543; x=1693381543; h=message-id:date:mime-version:cc:subject:to:references: from:in-reply-to:content-transfer-encoding; bh=yi/c9wKZe1Xzm2RAJvy3wwK0+vYsU+x02Pu4wd0CR5k=; b=gPXzMIGmBbHVeHgZAat/6iFvrjRPLW1nLBhlqNgvn4Bm3ZeNoeizyJoq f/096pRs1xIeDkikrTi/rS7rbbUZ/XfjcSeoabp5biu+MSmJJwhPFzMoi PRDJYgaHQbH3Jn1kgAWCoFi8s3SOg7YlnHONYRXlwFcrb1kAJvJrL/W8Q GCnmcmqdXrfvsDPudz5H/rhL7eGCImtzRm48Ksw8il1oGOkUiAiUjs6Er /CFXsKQiL/PNl2RsMHF+XILloBLf5lWR7GLK/5+41gc59ahCOREMkUBKd 5UF4UQgEcVOEulWnxLFXyQSAdLUOOcAYL+kzed5507VTRaduL17fH/bbs Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="321236211" X-IronPort-AV: E=Sophos;i="5.93,274,1654585200"; d="scan'208";a="321236211" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Aug 2022 00:45:43 -0700 X-IronPort-AV: E=Sophos;i="5.93,274,1654585200"; d="scan'208";a="672737036" Received: from hhuan14-mobl1.ccr.corp.intel.com (HELO [10.254.215.208]) ([10.254.215.208]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Aug 2022 00:45:37 -0700 Message-ID: <96ac1693-d87f-250d-c897-c79f13ed4c0a@linux.intel.com> Date: Tue, 30 Aug 2022 15:45:35 +0800 Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Cc: baolu.lu@linux.intel.com, Eric Auger , Liu Yi L , Jacob jun Pan , Zhangfei Gao , Zhu Tony , iommu@lists.linux.dev, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Jean-Philippe Brucker Subject: Re: [PATCH v12 13/17] iommu/sva: Refactoring iommu_sva_bind/unbind_device() Content-Language: en-US To: Yuan Can , Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Bjorn Helgaas , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker , Dave Jiang , Fenghua Yu , Vinod Koul References: <20220826121141.50743-1-baolu.lu@linux.intel.com> <20220826121141.50743-14-baolu.lu@linux.intel.com> <47879368-fb4e-79aa-35f9-018d871f013c@huawei.com> From: Baolu Lu In-Reply-To: <47879368-fb4e-79aa-35f9-018d871f013c@huawei.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2022/8/30 15:30, Yuan Can wrote: > > 在 2022/8/26 20:11, Lu Baolu 写道: >> The existing iommu SVA interfaces are implemented by calling the SVA >> specific iommu ops provided by the IOMMU drivers. There's no need for >> any SVA specific ops in iommu_ops vector anymore as we can achieve >> this through the generic attach/detach_dev_pasid domain ops. >> >> This refactors the IOMMU SVA interfaces implementation by using the >> iommu_detach/detach_device_pasid interfaces and align them with the > > Did you mean using the iommu_attach/detach_device_pasid interfaces here? The device driver oriented SVA interfaces keep consistent as before. Here we only refactor the IOMMU internal implementation. Best regards, baolu