From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C2DF612C for ; Thu, 17 Nov 2022 15:16:48 +0000 (UTC) Received: by mail-wm1-f48.google.com with SMTP id ay14-20020a05600c1e0e00b003cf6ab34b61so5369773wmb.2 for ; Thu, 17 Nov 2022 07:16:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=QqLoz4WimLaZOBWkpHa++cXKf6tUCOzTWtaNskWwH9g=; b=42cCR20Y1dCCfSiZno0zxS+4iVtGDq4obKRGTm3fck/wvSdc22st0r5FwsYgt8awA4 MadPuElvdNTTfsz2WVGPf4OHplJ1CFpBjx46KhxdPOU6Nf+o3d50Zvud64rM0GKi9RpU Vc1vqiyIIIn3TFB2PUtnNkpYL7OKxZSl0o6zdb2Wi5ubSCCDhN147Mt/GGaJ4OpU1Dvw qlqfQ0FkrymkzvuIk6gVajKU3T9pZIo166Hem2EtqU6je5KoDN6hWbBGYQM2T2HFJb23 qH8Y0EqEmNHv7CZTOONJSB1V+KCelIG5mJIQFuKOGvmUxWcL7KTmnpzgqT9v6VtqoznD eODw== X-Gm-Message-State: ANoB5pmy8fMqTHdFddZdJbiMz372YtBF11xymh4Wmop8n9ONViLNH4Jb x60vuVYLjAyg0/i4t2+dUPs= X-Google-Smtp-Source: AA0mqf4oG8m5KQtZr4PdyBvld3lNlzCDl2hvGtjp3UPoMMz/kfHo1COZJFNOrwcAjA/0XDq2/6W6ew== X-Received: by 2002:a05:600c:220b:b0:3cf:f747:71f with SMTP id z11-20020a05600c220b00b003cff747071fmr3969071wml.147.1668698206322; Thu, 17 Nov 2022 07:16:46 -0800 (PST) Received: from liuwe-devbox-debian-v2 ([51.145.34.42]) by smtp.gmail.com with ESMTPSA id g17-20020a05600c4ed100b003c701c12a17sm6914886wmq.12.2022.11.17.07.16.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Nov 2022 07:16:45 -0800 (PST) Date: Thu, 17 Nov 2022 15:16:38 +0000 From: Wei Liu To: Michael Kelley Cc: hpa@zytor.com, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, luto@kernel.org, peterz@infradead.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, bhelgaas@google.com, arnd@arndb.de, hch@infradead.org, m.szyprowski@samsung.com, robin.murphy@arm.com, thomas.lendacky@amd.com, brijesh.singh@amd.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, Tianyu.Lan@microsoft.com, kirill.shutemov@linux.intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, ak@linux.intel.com, isaku.yamahata@intel.com, dan.j.williams@intel.com, jane.chu@oracle.com, seanjc@google.com, tony.luck@intel.com, x86@kernel.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arch@vger.kernel.org, iommu@lists.linux.dev Subject: Re: [Patch v3 13/14] PCI: hv: Add hypercalls to read/write MMIO space Message-ID: References: <1668624097-14884-1-git-send-email-mikelley@microsoft.com> <1668624097-14884-14-git-send-email-mikelley@microsoft.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1668624097-14884-14-git-send-email-mikelley@microsoft.com> On Wed, Nov 16, 2022 at 10:41:36AM -0800, Michael Kelley wrote: [...] > > +static void hv_pci_read_mmio(struct device *dev, phys_addr_t gpa, int size, u32 *val) > +{ > + struct hv_mmio_read_input *in; > + struct hv_mmio_read_output *out; > + u64 ret; > + > + /* > + * Must be called with interrupts disabled so it is safe > + * to use the per-cpu input argument page. Use it for > + * both input and output. > + */ Perhaps adding something along this line? WARN_ON(!irqs_disabled()); I can fold this in if you agree. > + in = *this_cpu_ptr(hyperv_pcpu_input_arg); > + out = *this_cpu_ptr(hyperv_pcpu_input_arg) + sizeof(*in); > + in->gpa = gpa; > + in->size = size; > + > + ret = hv_do_hypercall(HVCALL_MMIO_READ, in, out); > + if (hv_result_success(ret)) { > + switch (size) { > + case 1: > + *val = *(u8 *)(out->data); > + break; > + case 2: > + *val = *(u16 *)(out->data); > + break; > + default: > + *val = *(u32 *)(out->data); > + break; > + } > + } else > + dev_err(dev, "MMIO read hypercall error %llx addr %llx size %d\n", > + ret, gpa, size); > +} > + > +static void hv_pci_write_mmio(struct device *dev, phys_addr_t gpa, int size, u32 val) > +{ > + struct hv_mmio_write_input *in; > + u64 ret; > + > + /* > + * Must be called with interrupts disabled so it is safe > + * to use the per-cpu input argument memory. > + */ Ditto. Thanks, Wei.