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[2003:e4:1f18:1700::43a]) by smtp.gmail.com with ESMTPSA id p8-20020a2ea408000000b00247e5087157sm1471161ljn.101.2022.03.08.07.59.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 07:59:10 -0800 (PST) Date: Tue, 8 Mar 2022 16:59:05 +0100 From: Thierry Reding To: Joerg Roedel , Will Deacon , Robin Murphy , Rob Herring Subject: Re: [PATCH v2 1/4] dt-bindings: arm-smmu: Document nvidia,memory-controller property Message-ID: References: <20211209163600.609613-1-thierry.reding@gmail.com> MIME-Version: 1.0 In-Reply-To: User-Agent: Mutt/2.2.1 (c8109e14) (2022-02-19) Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, Jon Hunter X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============7267975407343027666==" Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" --===============7267975407343027666== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="rFDGFzVNzKne2qqP" Content-Disposition: inline --rFDGFzVNzKne2qqP Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 16, 2022 at 02:25:20PM +0100, Thierry Reding wrote: > On Thu, Dec 09, 2021 at 05:35:57PM +0100, Thierry Reding wrote: > > From: Thierry Reding > >=20 > > On NVIDIA SoC's the ARM SMMU needs to interact with the memory > > controller in order to map memory clients to the corresponding stream > > IDs. Document how the nvidia,memory-controller property can be used to > > achieve this. > >=20 > > Note that this is a backwards-incompatible change that is, however, > > necessary to ensure correctness. Without the new property, most of the > > devices would still work but it is not guaranteed that all will. > >=20 > > Signed-off-by: Thierry Reding > > --- > > Changes in v2: > > - clarify why the new nvidia,memory-controller property is required > >=20 > > .../devicetree/bindings/iommu/arm,smmu.yaml | 17 +++++++++++++++++ > > 1 file changed, 17 insertions(+) >=20 > Hi Joerg, >=20 > can you pick up patches 1-3 of this series? DT bindings have been > reviewed by Rob and Will acked the ARM SMMU change. I can take the > device tree changes (patch 4) through the Tegra tree. Will, Robin, Joerg, I haven't seen this show up in linux-next yet but was hoping to see this go in for v5.18. Anything I can do to help this move along? Thanks, Thierry --rFDGFzVNzKne2qqP Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmInfUkACgkQ3SOs138+ s6G49w//Ygjl2iHsMwI94cYoUH9dcGuDS8MJQNrU1Cnul3dW5pIzNyFYD6S2n3AU gK/YYeZA1Ik8G4Q/Um+xmNSC0ZOVMng6fVmjpL2xVdOv1qeN135Hue1QZuUXzFV9 6fas+Y260jHRvPG1t0oS/HEvzmlRwDiYoKQe7h26kH9BpdLj/H0aMWhlu3Cb/coi UnypSm2sScPaIuCY1/cPlb50NrgxqQ4R/LrNa6Aud/x+HsZTPCMHCOLPnQUvkYyR Q/DEIFW8lyqJeOskopyuOqd43fPpzY+1Y0NwJuZhcpk0x4ikt8hh3J04eaEHsP67 af0twj+ENQvJ4fKiH0I1E38xtPi5uhtAKlTHU0hJs5LgZyoGLTvhiNAp7oOgSZXy 0I61nD65TBAqiv6AmpgFkXNRMBaS17BlkuhrwbKtbCwI+hbV8ppZSSbJr/AVQoDi oo6QaGhkMYNVRUnXRA7Vi5mA32vxOf/5328W4SS9OTs7kV7xeRNsfHe6ZXOtqzc+ f2WUOfSJ3FgCEoAITsCCMK9NI6oaqMBSQOFsTG4yuXgYn2Px3PdgfRVE6X7cBbYr 0aTiGmzx3Im8dUSm82LZovu55yDlJZ0Q0/EU+zNLfQC2rs2biLhJyNqcRgD6fCmH 2W0sB+udBwSjicEc3XNRzk70i3J++uk7f1oQ6Ak+gL0Dvl2YBBY= =z2UF -----END PGP SIGNATURE----- --rFDGFzVNzKne2qqP-- --===============7267975407343027666== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu --===============7267975407343027666==--