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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id l13-20020a05600002ad00b00203d64c5289sm14817902wry.112.2022.03.21.04.22.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 04:22:33 -0700 (PDT) Date: Mon, 21 Mar 2022 11:22:09 +0000 From: Jean-Philippe Brucker To: Lu Baolu Subject: Re: [PATCH RFC 01/11] iommu: Add pasid_bits field in struct dev_iommu Message-ID: References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> <20220320064030.2936936-2-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220320064030.2936936-2-baolu.lu@linux.intel.com> Cc: Kevin Tian , Ashok Raj , Robin Murphy , linux-kernel@vger.kernel.org, Christoph Hellwig , Jean-Philippe Brucker , iommu@lists.linux-foundation.org, Jacob jun Pan , Jason Gunthorpe , Will Deacon X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hi Baolu, On Sun, Mar 20, 2022 at 02:40:20PM +0800, Lu Baolu wrote: > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 627a3ed5ee8f..8e262210b5ad 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -2812,6 +2812,7 @@ static int arm_smmu_dev_enable_feature(struct device *dev, > master->iopf_enabled = true; > return 0; > case IOMMU_DEV_FEAT_SVA: > + dev->iommu->pasid_bits = master->ssid_bits; This would be better in arm_smmu_probe_device() Thanks, Jean > return arm_smmu_master_enable_sva(master); > default: > return -EINVAL; _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu