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Tue, 12 Apr 2022 20:27:16 -0700 (PDT) Received: from builder.lan ([2600:1700:a0:3dc8:3697:f6ff:fe85:aac9]) by smtp.gmail.com with ESMTPSA id o64-20020acad743000000b002ef3b249b9esm13165081oig.58.2022.04.12.20.27.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Apr 2022 20:27:16 -0700 (PDT) Date: Tue, 12 Apr 2022 22:27:14 -0500 From: Bjorn Andersson To: Rohit Agarwal Subject: Re: [PATCH v2 7/7] ARM: dts: qcom: sdx65: Add Shared memory manager support Message-ID: References: <1649670615-21268-1-git-send-email-quic_rohiagar@quicinc.com> <1649670615-21268-8-git-send-email-quic_rohiagar@quicinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1649670615-21268-8-git-send-email-quic_rohiagar@quicinc.com> Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, ulf.hansson@linaro.org, will@kernel.org, linux-mmc@vger.kernel.org, agross@kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, robh+dt@kernel.org, manivannan.sadhasivam@linaro.org, krzk+dt@kernel.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Mon 11 Apr 04:50 CDT 2022, Rohit Agarwal wrote: > Add smem node to support shared memory manager on SDX65 platform. > > Signed-off-by: Rohit Agarwal > --- > arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi > index 210e55c..8fef644 100644 > --- a/arch/arm/boot/dts/qcom-sdx65.dtsi > +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi > @@ -113,6 +113,12 @@ > }; > }; > > + smem { > + compatible = "qcom,smem"; > + memory-region = <&smem_mem>; > + hwlocks = <&tcsr_mutex 3>; > + }; As you only have the single region, please move the compatible and hwlocks properties into the &smem_mem node (see sm8450.dtsi in arm64 as an example). I've applied the other dts changes. Thanks, Bjorn > + > soc: soc { > #address-cells = <1>; > #size-cells = <1>; > -- > 2.7.4 > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu