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Date: Thu, 8 Sep 2022 14:20:55 +0200
From: Joerg Roedel <joro@8bytes.org>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Vasant Hegde <vasant.hegde@amd.com>, iommu@lists.linux.dev,
	suravee.suthikulpanit@amd.com
Subject: Re: [PATCH v3 0/9] iommu/amd: Add Generic IO Page Table Framework
 Support for v2 Page Table
Message-ID: <YxneJ2RqaatKmoYT@8bytes.org>
References: <20220825063939.8360-1-vasant.hegde@amd.com>
 <77d2ea43-9752-b5f3-78ef-8cdae944eee4@amd.com>
 <05f9784b-15b6-2a9b-2d9e-19e1430f74e2@arm.com>
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 <YxjMQpGYaHfsiuL+@nvidia.com>
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In-Reply-To: <YxjMQpGYaHfsiuL+@nvidia.com>

On Wed, Sep 07, 2022 at 01:52:18PM -0300, Jason Gunthorpe wrote:
> Why can an identity map be attached to the RID in v2, but not a full
> translation? It seems like a very strange design that entering PASID
> mode completely breaks RID support.

The reason is that AMD IOMMUs do two-level translation, which means that
the addresses in the PASID page-tables are translated via the v1
page-table again. In order to be able to use Linux page-tables for PASID
mappings the v1 page-table needs to be identity mapped.

Regards,

	Joerg