Linux IOMMU Development
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From: Nicolin Chen <nicolinc@nvidia.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: "agross@kernel.org" <agross@kernel.org>,
	"bjorn.andersson@linaro.org" <bjorn.andersson@linaro.org>,
	"konrad.dybcio@somainline.org" <konrad.dybcio@somainline.org>,
	"joro@8bytes.org" <joro@8bytes.org>,
	"will@kernel.org" <will@kernel.org>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"sricharan@codeaurora.org" <sricharan@codeaurora.org>,
	"jgg@nvidia.com" <jgg@nvidia.com>,
	"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/6] iommu/msm: Add missing __disable_clocks calls
Date: Tue, 20 Sep 2022 11:46:40 -0700	[thread overview]
Message-ID: <YyoKkIjiou4kBwPm@Asurada-Nvidia> (raw)
In-Reply-To: <BN9PR11MB52769AEAFD33D2501B6571538C4C9@BN9PR11MB5276.namprd11.prod.outlook.com>

On Tue, Sep 20, 2022 at 06:15:21AM +0000, Tian, Kevin wrote:
> External email: Use caution opening links or attachments
> 
> 
> > From: Nicolin Chen <nicolinc@nvidia.com>
> > Sent: Thursday, September 15, 2022 3:56 PM
> >
> > The clock is not symmetrically disabled in the error-out routines.
> >
> > Fixes: 109bd48ea2e1 ("iommu/msm: Add DT adaptation")
> > Cc: stable@vger.kernel.org
> > Cc: Sricharan R <sricharan@codeaurora.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
> > Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
> > ---
> >  drivers/iommu/msm_iommu.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c
> > index 6a24aa804ea3..a7d41ba4a47b 100644
> > --- a/drivers/iommu/msm_iommu.c
> > +++ b/drivers/iommu/msm_iommu.c
> > @@ -418,6 +418,7 @@ static int msm_iommu_attach_dev(struct
> > iommu_domain *domain, struct device *dev)
> >                       list_for_each_entry(master, &iommu->ctx_list, list) {
> >                               if (master->num) {
> >                                       dev_err(dev, "domain already
> > attached");
> > +                                     __disable_clocks(iommu);
> >                                       ret = -EEXIST;
> >                                       goto fail;
> >                               }
> > @@ -425,6 +426,7 @@ static int msm_iommu_attach_dev(struct
> > iommu_domain *domain, struct device *dev)
> >                                       msm_iommu_alloc_ctx(iommu-
> > >context_map,
> >                                                           0, iommu->ncb);
> >                               if (IS_ERR_VALUE(master->num)) {
> > +                                     __disable_clocks(iommu);
> 
> also need to free_ctx() for already walked nodes.

Oooo...yes. Probably could reuse the detach() -- [1].

> btw it's a bit weird that although here is coded based on a list
> in reality there is at most one node per list. According to
> insert_iommu_master() a master object is allocated and inserted
> to the ctx_list only if the ctx_list is currently empty...

Yea. The insert_iommu_master() indicates that there would be only
one master on a cts_list, while the rest part of the driver tries
to take care of a potential multi-master per cts_list case, which
practically won't happen by looking at the DT file. But the driver
existed for the legacy platform data configuration too, so I don't
intend to change too much...

Thanks!
Nic

[1]
diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c
index 6a24aa804ea3..30c5662e24bc 100644
--- a/drivers/iommu/msm_iommu.c
+++ b/drivers/iommu/msm_iommu.c
@@ -394,6 +394,33 @@ static struct iommu_device *msm_iommu_probe_device(struct device *dev)
 	return &iommu->iommu;
 }
 
+static void msm_iommu_detach_dev(struct iommu_domain *domain,
+				 struct device *dev)
+{
+	struct msm_priv *priv = to_msm_priv(domain);
+	unsigned long flags;
+	struct msm_iommu_dev *iommu;
+	struct msm_iommu_ctx_dev *master;
+	int ret;
+
+	free_io_pgtable_ops(priv->iop);
+
+	spin_lock_irqsave(&msm_iommu_lock, flags);
+	list_for_each_entry(iommu, &priv->list_attached, dom_node) {
+		ret = __enable_clocks(iommu);
+		if (ret)
+			goto fail;
+
+		list_for_each_entry(master, &iommu->ctx_list, list) {
+			msm_iommu_free_ctx(iommu->context_map, master->num);
+			__reset_context(iommu->base, master->num);
+		}
+		__disable_clocks(iommu);
+	}
+fail:
+	spin_unlock_irqrestore(&msm_iommu_lock, flags);
+}
+
 static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
 {
 	int ret = 0;
@@ -418,13 +445,15 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
 			list_for_each_entry(master, &iommu->ctx_list, list) {
 				if (master->num) {
 					dev_err(dev, "domain already attached");
+					__disable_clocks(iommu);
 					ret = -EEXIST;
 					goto fail;
 				}
 				master->num =
 					msm_iommu_alloc_ctx(iommu->context_map,
 							    0, iommu->ncb);
-				if (IS_ERR_VALUE(master->num)) {
+				if (master->num < 0) {
+					__disable_clocks(iommu);
 					ret = -ENODEV;
 					goto fail;
 				}
@@ -439,37 +468,12 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
 
 fail:
 	spin_unlock_irqrestore(&msm_iommu_lock, flags);
+	if (ret)
+		msm_iommu_detach_dev(domain, dev);
 
 	return ret;
 }
 
-static void msm_iommu_detach_dev(struct iommu_domain *domain,
-				 struct device *dev)
-{
-	struct msm_priv *priv = to_msm_priv(domain);
-	unsigned long flags;
-	struct msm_iommu_dev *iommu;
-	struct msm_iommu_ctx_dev *master;
-	int ret;
-
-	free_io_pgtable_ops(priv->iop);
-
-	spin_lock_irqsave(&msm_iommu_lock, flags);
-	list_for_each_entry(iommu, &priv->list_attached, dom_node) {
-		ret = __enable_clocks(iommu);
-		if (ret)
-			goto fail;
-
-		list_for_each_entry(master, &iommu->ctx_list, list) {
-			msm_iommu_free_ctx(iommu->context_map, master->num);
-			__reset_context(iommu->base, master->num);
-		}
-		__disable_clocks(iommu);
-	}
-fail:
-	spin_unlock_irqrestore(&msm_iommu_lock, flags);
-}
-
 static int msm_iommu_map(struct iommu_domain *domain, unsigned long iova,
 			 phys_addr_t pa, size_t len, int prot, gfp_t gfp)
 {

  reply	other threads:[~2022-09-20 18:47 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-15  7:53 [PATCH v3 0/6] Define EINVAL as device/domain incompatibility Nicolin Chen
2022-09-15  7:53 ` [PATCH v3 3/6] iommu: Add return value rules to attach_dev op and APIs Nicolin Chen
2022-09-20  6:24   ` Tian, Kevin
2022-09-20 19:26     ` Nicolin Chen
2022-09-15  7:53 ` [PATCH v3 5/6] iommu: Use EINVAL for incompatible device/domain in ->attach_dev Nicolin Chen
2022-09-20  6:38   ` Tian, Kevin
2022-09-20 18:06     ` Jason Gunthorpe
2022-09-21  8:14       ` Tian, Kevin
2022-09-15  7:56 ` [PATCH v3 1/6] iommu/msm: Add missing __disable_clocks calls Nicolin Chen
2022-09-20  6:15   ` Tian, Kevin
2022-09-20 18:46     ` Nicolin Chen [this message]
2022-09-21  7:27       ` Tian, Kevin
2022-09-15  7:58 ` [PATCH v3 2/6] iommu/amd: Drop unnecessary checks in amd_iommu_attach_device() Nicolin Chen
2022-09-15  7:58 ` [PATCH v3 4/6] iommu: Regulate EINVAL in ->attach_dev callback functions Nicolin Chen
2022-09-20  6:29   ` Tian, Kevin
2022-09-20 16:08     ` Nicolin Chen
2022-09-15  7:58 ` [PATCH v3 6/6] iommu: Propagate ret for a potential soft failure EINVAL Nicolin Chen
2022-09-20  6:50   ` Tian, Kevin
2022-09-20 20:39     ` Nicolin Chen

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