From: Jason Gunthorpe <jgg@ziepe.ca>
To: laurentiu.tudor@nxp.com
Cc: thierry.reding@gmail.com, robin.murphy@arm.com,
iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] iommu: map reserved memory as cacheable if device is coherent
Date: Wed, 26 Jul 2023 13:47:24 -0300 [thread overview]
Message-ID: <ZMFOHM/SihB3Pe+b@ziepe.ca> (raw)
In-Reply-To: <20230726125059.19123-1-laurentiu.tudor@nxp.com>
On Wed, Jul 26, 2023 at 03:50:59PM +0300, laurentiu.tudor@nxp.com wrote:
> From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
>
> Check if the device is marked as DMA coherent in the DT and if so,
> map its reserved memory as cacheable in the IOMMU.
> This fixes the recently added IOMMU reserved memory support which
> uses IOMMU_RESV_DIRECT without properly building the PROT for the
> mapping.
>
> Fixes: a5bf3cfce8cb ("iommu: Implement of_iommu_get_resv_regions()")
> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
> ---
> drivers/iommu/of_iommu.c | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Jason
prev parent reply other threads:[~2023-07-26 16:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-26 12:50 [PATCH] iommu: map reserved memory as cacheable if device is coherent laurentiu.tudor
2023-07-26 16:47 ` Jason Gunthorpe [this message]
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