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From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
	suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
	jsnitsel@redhat.com
Subject: Re: [PATCH RESEND 04/10] iommu/amd: Add support to enable/disable SVA feature
Date: Thu, 7 Sep 2023 09:04:39 -0300	[thread overview]
Message-ID: <ZPm8V5C28scC0kgi@ziepe.ca> (raw)
In-Reply-To: <e1e3b265-c39c-3288-092c-4293b7f3b83a@amd.com>

On Thu, Sep 07, 2023 at 12:45:01PM +0530, Vasant Hegde wrote:
> Jason,
> 
> 
> On 8/31/2023 5:16 AM, Jason Gunthorpe wrote:
> > On Thu, Aug 31, 2023 at 12:30:21AM +0530, Vasant Hegde wrote:
> >>>>>> +int amd_iommu_sva_disable(struct device *dev)
> >>>>>> +{
> >>>>>> +	struct amd_iommu *iommu = get_amd_iommu_from_dev(dev);
> >>>>>> +	struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
> >>>>>> +
> >>>>>> +	if (!iommu || !dev_data)
> >>>>>> +		return -EINVAL;
> >>>>>> +
> >>>>>> +	return amd_iommu_sva_gcr3_uninit(dev_data);
> >>>>>> +}
> >>>>>
> >>>>> I think these features are a mistake, you need to implement them for
> >>>>> now but I wouldn't touch the gcr3 table, and disable should be a NOP.
> >>>>
> >>>> We need to configure Device Table Entry when we enable/disable SVA.
> >>>
> >>> The DTE should only be changed by bind/unbind of RID/PASID - it has
> >>> nothing to do with these APIs.
> >>
> >> Above functions are called during enable_feature(SVA) path. Not in PASID
> >> bind/unbind path. In PASID bind/unbind path we just update PASID table.
> > 
> > I know, which is why they can't change anything about the IOMMU
> > HW. Only attach/bind/unbind should change HW state.
> > 
> > I intend to remove these APIs once ARM is fixed, so please don't start
> > to rely on them. The driver is doing something wrong if it is changing
> > HW setups outside of attach/bind/unbind.
> 
> 
> If you intend to remove enable_feature(SVA) API completely, then you help us to
> figure out how to handle below issues?
> 
> 1) During attach_device() we don't know whether device is really going to use
> SVA or not. So we want to start with minimal GCR3 table (that can handle just
> PASID 0) and during enable_feature(SVA) we want to enable GCR3 table that can
> handle max_pasids supported by a device. That way we can avoid performance
> penalty if device is not using SVA (extra GCR3 table walk).

Resize the GCR3 table when the first pasid using attach happens.

We can discuss if/when it should be shrunk back to minimal.

> 2) If we boot with passthrough mode, then during attach_device() we are not
> allocating GCR3 table. It will be allocated only when its needed. That way we
> are not wasting memory.

> Do you suggest that the driver setup GCR3 table at the first PASID binding to
> the device?

Yes. PASID must work correctly stand alone.

Jason

  reply	other threads:[~2023-09-07 12:04 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-23 14:04 [PATCH RESEND 00/10] iommu/amd: SVA Support (Part 4) - SVA and IOPF Vasant Hegde
2023-08-23 14:04 ` [PATCH RESEND 01/10] iommu/amd: Rename amd_iommu_v2_supported() as amd_iommu_sva_supported() Vasant Hegde
2023-08-23 14:04 ` [PATCH RESEND 02/10] iommu/amd: Add support for enabling/disabling IOMMU features Vasant Hegde
2023-08-23 14:04 ` [PATCH RESEND 03/10] iommu/amd: Initial SVA support for AMD IOMMU Vasant Hegde
2023-08-23 14:28   ` Jason Gunthorpe
2023-08-28 10:39     ` Vasant Hegde
2023-08-30 17:07       ` Jason Gunthorpe
2023-09-05  6:18         ` Vasant Hegde
2023-09-05 12:26           ` Jason Gunthorpe
2023-09-05 14:39             ` Vasant Hegde
2023-09-05 18:14               ` Jason Gunthorpe
2023-09-11 12:16                 ` Vasant Hegde
2023-09-11 12:41                   ` Jason Gunthorpe
2023-08-23 14:04 ` [PATCH RESEND 04/10] iommu/amd: Add support to enable/disable SVA feature Vasant Hegde
2023-08-23 15:28   ` Jason Gunthorpe
2023-08-28 10:45     ` Vasant Hegde
2023-08-30 17:09       ` Jason Gunthorpe
2023-08-30 19:00         ` Vasant Hegde
2023-08-30 23:46           ` Jason Gunthorpe
2023-09-07  7:15             ` Vasant Hegde
2023-09-07 12:04               ` Jason Gunthorpe [this message]
2023-08-23 14:04 ` [PATCH RESEND 05/10] iommu/amd: Move PPR-related functions into ppr.c Vasant Hegde
2023-08-23 14:04 ` [PATCH RESEND 06/10] iommu/amd: Define per-IOMMU iopf_queue Vasant Hegde
2023-08-23 14:04 ` [PATCH RESEND 07/10] iommu/amd: Add support for page response Vasant Hegde
2023-08-23 14:04 ` [PATCH RESEND 08/10] iommu/amd: Add support for add/remove device for IOPF Vasant Hegde
2023-08-23 15:33   ` Jason Gunthorpe
2023-08-30 14:34     ` Vasant Hegde
2023-08-23 14:04 ` [PATCH RESEND 09/10] iommu/amd: Add IO page fault notifier handler Vasant Hegde
2023-08-23 14:04 ` [PATCH RESEND 10/10] iommu/amd: Introduce logic to enable/disable IOPF Vasant Hegde
2023-08-23 15:36   ` Jason Gunthorpe

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