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AJvYcCXjt7OSJF753wtu1QE+S6DSdfpiDTQBGR+OlHg38FCOWos1D9ysnzSiSQkRQTvPuSWTmxIL2A==@lists.linux.dev X-Gm-Message-State: AOJu0YwneVeg1s4UEx+JirYNd2H8+gMpbUwKdq/crMDBOVaeBFcvucu5 2l28Arm/1m096+T0NjpDRU00zur4wPkLpMAu2fgeXxmjHzi6rCRTdoagwZA843APv5kvQijUSV4 XnA== X-Google-Smtp-Source: AGHT+IGWRveftZO1wji7CvlkOdr/kE0uz4l6esz3nDwfvBuY+d4Ew0jp3EjBMobySbyO9+duVZkiSgztRF8= X-Received: from pfvf19.prod.google.com ([2002:a05:6a00:1ad3:b0:732:51fc:618f]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:cccd:b0:224:910:23f6 with SMTP id d9443c01a7336-22bea4fcc8dmr67226125ad.45.1744407171250; Fri, 11 Apr 2025 14:32:51 -0700 (PDT) Date: Fri, 11 Apr 2025 14:32:49 -0700 In-Reply-To: Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250410204149.2576104-1-ross.philipson@oracle.com> <20250410204149.2576104-2-ross.philipson@oracle.com> Message-ID: Subject: Re: [PATCH v13 01/19] Documentation/x86: Secure Launch kernel documentation From: Sean Christopherson To: ross.philipson@oracle.com Cc: ALOK TIWARI , linux-kernel@vger.kernel.org, x86@kernel.org, linux-integrity@vger.kernel.org, linux-doc@vger.kernel.org, linux-crypto@vger.kernel.org, kexec@lists.infradead.org, linux-efi@vger.kernel.org, iommu@lists.linux.dev, dpsmith@apertussolutions.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, dave.hansen@linux.intel.com, ardb@kernel.org, mjg59@srcf.ucam.org, James.Bottomley@hansenpartnership.com, peterhuewe@gmx.de, jarkko@kernel.org, jgg@ziepe.ca, luto@amacapital.net, nivedita@alum.mit.edu, herbert@gondor.apana.org.au, davem@davemloft.net, corbet@lwn.net, ebiederm@xmission.com, dwmw2@infradead.org, baolu.lu@linux.intel.com, kanth.ghatraju@oracle.com, andrew.cooper3@citrix.com, trenchboot-devel@googlegroups.com Content-Type: text/plain; charset="us-ascii" On Fri, Apr 11, 2025, ross.philipson@oracle.com wrote: > On 4/10/25 10:50 PM, ALOK TIWARI wrote: > > > > > > On 11-04-2025 02:11, Ross Philipson wrote: > > > + > > > + - Entry from the dynamic launch jumps to the SL stub. > > > + - SL stub fixes up the world on the BSP. > > > + - For TXT, SL stub wakes the APs, fixes up their worlds. > > > + - For TXT, APs are left halted using MONITOR/MWAIT intructions. > > > > typo intructions -> instruction > > Thanks for the review. They are two separate instructions so is this really > incorrect? >From the peanut gallery, I'd just drop the "instruction(s)" qualifier, i.e. - For TXT, APs are left halted using MONITOR/MWAIT. Pedantically, it's the combination of MONTIOR+MWAIT that puts the CPU into a sleep state, not the individual instructions. And while I'm picking nits, the documentation is also a bit misleading as the CPU isn't halted per se. I'd go with something like: - For TXT, APs are left in an optimized (MONITOR/MWAIT) wait state.