Re: Query on ARM SMMUv3 nested support

[Nicolin Chen <nicolinc@nvidia.com>]

Hi Shameer,

Sorry for the late reply. Having been occupied by multiple tasks
lately.

On Fri, Mar 22, 2024 at 03:04:42PM +0000, Shameerali Kolothum Thodi wrote:

> Thanks for the reference to above CMDQ-V. Looks interesting.
> I think we can have a go with retry logic first to allocate a new hwpt
> if the attach fails. For now, I have a temp fix where I allocate a new
> hwpt every time.
> 
> I also noticed another problem with the commit below,
> 6691a2f("hw/arm/smmu-common: Use sysmem for get_address _space until !!s2_hwpti")
> 
> This actually breaks a virtio-pci dev assignment when that is the only
> assigned device to the Guest without any pass-through dev in nested
> scenario.
>
> I have a temp fix for that as well here,
> (I know it is ugly!). I will revisit that again. Please let me know if you have
> any ideas.

I am not quite getting the case here. Is that virtio-pci device
behind a nested-SMMU while there is no S2 hwpt? In that case, why
does this virtio-pci device require a "nested-smmuv3"?

> I still have that io_uring write issue mentioned in the other thread[1],
> but for now I use io_uring API only for read and make use of normal write()
> for updating kernel with page response.
> 
> I have done some basic sanity runs with our ACC devices and those seems
> to work(of course needs more testing).
> 
> Please have a look and let me know if you spot anything.

I'm glad that you include the fault handling support. I'll give
that a try.

Thanks
Nicolin