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Mon, 8 Apr 2024 23:12:58 -0700 Date: Mon, 8 Apr 2024 23:12:57 -0700 From: Nicolin Chen To: Shameerali Kolothum Thodi CC: Jason Gunthorpe , "iommu@lists.linux.dev" , Linuxarm , Zhangfei Gao , Michael Shavit , Eric Auger , Moritz Fischer , "baolu.lu@linux.intel.com" Subject: Re: Query on ARM SMMUv3 nested support Message-ID: References: <4a37c695bf84425ea5159b82c202cb81@huawei.com> <02f3fbc5145d4449b3313eb802ecfa2c@huawei.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <02f3fbc5145d4449b3313eb802ecfa2c@huawei.com> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E5F:EE_|DS0PR12MB7629:EE_ X-MS-Office365-Filtering-Correlation-Id: 580c15eb-0cb9-4cfb-b2bf-08dc585c243d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Apr 2024 06:13:14.5995 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 580c15eb-0cb9-4cfb-b2bf-08dc585c243d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E5F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7629 Sorry for my belated reply. On Tue, Apr 02, 2024 at 07:25:56AM +0000, Shameerali Kolothum Thodi wrote: > Here we have specified nested-smmuv3 and have a PCIe root port(ioh3420) and > a virtio-pci dev(for virtfs). Once this VM is up and running, both the ioh3420 > and virtio-9p-pci will not work as expected as we return sysmem address space > for them. > > And then later when you try to hotplug a vfio dev to the PCIe root port, > device_add vfio-pci,host=0000:7d:02.1,bus=rp1,id=net1,iommufd=iommufd0 > > it won't work either because the address space for ioh3420 is wrong. > > Taking another look at this, I think we can replace my earlier attempt to fix > this by detecting if the dev is vfio or not and add that into the check below, > > --- a/hw/arm/smmu-common.c > +++ b/hw/arm/smmu-common.c > @@ -619,8 +619,15 @@ static AddressSpace *smmu_find_add_as(PCIBus > *bus, void *opaque, int devfn) > SMMUState *s = opaque; > SMMUPciBus *sbus = smmu_get_sbus(s, bus); > SMMUDevice *sdev = smmu_get_sdev(s, sbus, bus, devfn); > + bool is_vfio = false; > + PCIDevice *pdev; > > - if (s->nested && !s->s2_hwpt) { > + pdev = pci_find_device(bus, pci_bus_num(bus), devfn); > + if (object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { > + is_vfio = true; > + } > + > + if (is_vfio && s->nested && !s->s2_hwpt) { > return &sdev->as_sysmem; > } else { > return &sdev->as; > > Please let me know your thoughts on this. Hmm, checking "vfio-pci" here feels a bit of layer violation.. But I understand how you got there... I think that the current way of enabling the "nested" flag for a device is a bit messy: if -machine has "iommu=nested-smmuv3" && -device is "vfio_pci" && -device has "iommufd" Any other device that doesn't meet the latter two conditions is ambiguously added to a soft smmuv3, which feels wrong to me now. Also, the callbacks from hw/vfio/pci.c to iommu are tricky as well: vfio_realize() { pci_device_iommu_address_space() { smmu_find_add_as(); // Can only assume vfio-pci is behind // a nested SMMU. So returns system AS } vfio_attach_device() { ioctl(VFIO_DEVICE_BIND_IOMMUFD); ioctl(VFIO_DEVICE_ATTACH_IOMMUFD_PT); listener_add_address_space() { if (memory_region_is_iommu(section->mr)) { // Skip iommu_notifier_init(IOMMU_NOTIFIER_IOTLB_EVENTS); memory_region_iommu_replay(); } } } } In my view, we should sort this out with a cleaner enabling command first. And then, as Jason pointed out, other devices (non vfio-pci) should probably not be added to the SMMU, i.e. they might need to be added to a separate PCI bus/bridge with out iommu. In this case, the vSMMU module would not need an iommu AS at all when "iommu=nested-smmuv3". Thoughts? Thanks Nicolin