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[95.203.26.173]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-33238272a7csm41552511fa.15.2025.08.11.07.56.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Aug 2025 07:56:11 -0700 (PDT) From: Uladzislau Rezki X-Google-Original-From: Uladzislau Rezki Date: Mon, 11 Aug 2025 16:56:09 +0200 To: Dave Hansen Cc: Uladzislau Rezki , Ethan Zhao , Baolu Lu , Jason Gunthorpe , Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Jann Horn , Vasant Hegde , Alistair Popple , Peter Zijlstra , Jean-Philippe Brucker , Andy Lutomirski , Yi Lai , iommu@lists.linux.dev, security@kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v3 1/1] iommu/sva: Invalidate KVA range on kernel TLB flush Message-ID: References: <20250806155223.GV184255@nvidia.com> <20250806160904.GX184255@nvidia.com> <62d21545-9e75-41e3-89a3-f21dda15bf16@intel.com> <4a8df0e8-bd5a-44e4-acce-46ba75594846@linux.intel.com> <4ce79c80-1fc8-4684-920a-c8d82c4c3dc8@intel.com> <2611981e-3678-4619-b2ab-d9daace5a68a@gmail.com> <83c47939-7366-4b97-9368-02d432ddc24a@intel.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <83c47939-7366-4b97-9368-02d432ddc24a@intel.com> On Mon, Aug 11, 2025 at 06:55:52AM -0700, Dave Hansen wrote: > On 8/11/25 02:15, Uladzislau Rezki wrote: > >> kernel_pte_work.list is global shared var, it would make the producer > >> pte_free_kernel() and the consumer kernel_pte_work_func() to operate in > >> serialized timing. In a large system, I don't think you design this > >> deliberately 🙂 > >> > > Sorry for jumping. > > > > Agree, unless it is never considered as a hot path or something that can > > be really contented. It looks like you can use just a per-cpu llist to drain > > thinks. > > Remember, the code that has to run just before all this sent an IPI to > every single CPU on the system to have them do a (on x86 at least) > pretty expensive TLB flush. > > If this is a hot path, we have bigger problems on our hands: the full > TLB flush on every CPU. > > So, sure, there are a million ways to make this deferred freeing more > scalable. But the code that's here is dirt simple and self contained. If > someone has some ideas for something that's simpler and more scalable, > then I'm totally open to it. > You could also have a look toward removing the &kernel_pte_work.lock. Replace it by llist_add() on adding side and llist_for_each_safe(n, t, llist_del_all(&list)) on removing side. So you do not need guard(spinlock) stuff. If i do not miss anything. > > But this is _not_ the place to add complexity to get scalability. > OK. -- Uladzislau Rezki