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Date: Wed, 17 Sep 2025 13:10:47 +0100
From: Will Deacon <will@kernel.org>
To: "guoyaxing@bosc.ac.cn" <guoyaxing@bosc.ac.cn>
Cc: linux-riscv <linux-riscv@lists.infradead.org>,
	iommu <iommu@lists.linux.dev>, tjeznach <tjeznach@rivosinc.com>,
	joro <joro@8bytes.org>, "robin.murphy" <robin.murphy@arm.com>,
	"paul.walmsley" <paul.walmsley@sifive.com>,
	palmer <palmer@dabbelt.com>, aou <aou@eecs.berkeley.edu>,
	alex <alex@ghiti.fr>, anxu <anxu@bosc.ac.cn>,
	wangran <wangran@bosc.ac.cn>
Subject: Re: Re: [PATCH v1 1/3] iommu/riscv: Add iommu perf driver
Message-ID: <aMqlR4vDOgrFuCUj@willie-the-truck>
References: <20250915020911.1313-1-guoyaxing@bosc.ac.cn>
 <aMfsj1U7NY2m68T4@willie-the-truck>
 <202509161827232434929@bosc.ac.cn>
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In-Reply-To: <202509161827232434929@bosc.ac.cn>

[nit: your email client has made a big mess of the thread here]

On Tue, Sep 16, 2025 at 06:27:23PM +0800, guoyaxing@bosc.ac.cn wrote:
> > PMU drivers are better placed under drivers/perf/
> 
> I did a quick reading of SMMU pmu driver in drivers/perf/.  However, If
> the RISC-V IOMMU PMU driver is placed under drivers/perf/ as the SMMU did,
> it would cause an overlap in the iomem resource region between the two
> devices(iommu & iommu pmu), because it needs to share interrupt-related
> registers (such as the IPSR register) with the main IOMMU driver.

Is that not something you can resolve with IRQF_SHARED?

Will