From: Jason Gunthorpe <jgg@nvidia.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, skolothumtho@nvidia.com,
praan@google.com
Subject: Re: [PATCH rc v1 1/4] iommu/arm-smmu-v3: Add ignored bits to fix STE update sequence
Date: Sun, 7 Dec 2025 12:09:10 -0400 [thread overview]
Message-ID: <aTWmpijaV75aixNb@nvidia.com> (raw)
In-Reply-To: <aTUEikcWXWwKAS/1@nvidia.com>
On Sat, Dec 06, 2025 at 08:37:30PM -0800, Nicolin Chen wrote:
> > Then ignored should be adjusted by the used: Only if both used are 1
> > should the bit become ignored. Otherwise we can rely on which ever
> > used is 0 to generate the hitless update.
>
> Hmm, not sure why it has to be both used.
Thats the only case that causes an issue, if only one is used then
there is no need to perform a breaking update.
If cur_used is 0 then the bit will be set in the first update, if
target_used is 0 then the bit will be set during the last update.
> > /* Bits can change because they are not currently being used */
> > + cur_used[i] &= ~ignored[i];
> > unused_update[i] = (entry[i] & cur_used[i]) |
> > (target[i] & ~cur_used[i]);
>
> If one of ignored bits is set in entry[i] but unset in target[i],
> the unused_update will first mask it away, resulting in an extra
> unnecessary update (though it's still hitless).
Yes, this is how it has always worked. The point is to leave the
existing the same not try to optimize it using ignored.
> One more change that we need is at the last equation:
> - if ((unused_update[i] & target_used[i]) != target[i])
> + if ((unused_update[i] & target_used[i] & ~ignored[i]) !=
> + (target[i] & ~ignored[i]))
>
> Either side might have the ignored bits, so we have to suppress
> ignored on both sides, which is required in the similar routine
> in arm_smmu_entry_differs_in_used_bits() of the kunit code.
The only way ignored is set is if both sides have it set and then we
update the bit in the firsy cycle meaning unused_update must have the
final value. There is no need to mask target since it will match. Not
changing this line is a big part of what makes this appealing because
it keeps the logic straightforward, in case ignored is used we shift
the update always to the first cycle then everything else is the same.
Jason
next prev parent reply other threads:[~2025-12-07 16:09 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-06 0:51 [PATCH rc v1 0/4] iommu/arm-smmu-v3: Fix hitless STE update in nesting cases Nicolin Chen
2025-12-06 0:52 ` [PATCH rc v1 1/4] iommu/arm-smmu-v3: Add ignored bits to fix STE update sequence Nicolin Chen
2025-12-06 14:19 ` Shuai Xue
2025-12-06 19:38 ` Jason Gunthorpe
2025-12-06 19:34 ` Jason Gunthorpe
2025-12-06 19:45 ` Nicolin Chen
2025-12-06 19:57 ` Jason Gunthorpe
2025-12-07 4:37 ` Nicolin Chen
2025-12-07 16:09 ` Jason Gunthorpe [this message]
2025-12-07 19:35 ` Nicolin Chen
2025-12-07 20:11 ` Nicolin Chen
2025-12-06 0:52 ` [PATCH rc v1 2/4] iommu/arm-smmu-v3: Ignore STE MEV when computing the " Nicolin Chen
2025-12-06 0:52 ` [PATCH rc v1 3/4] iommu/arm-smmu-v3: Ignore STE EATS " Nicolin Chen
2025-12-06 19:46 ` Jason Gunthorpe
2025-12-06 19:54 ` Nicolin Chen
2025-12-06 0:52 ` [PATCH rc v1 4/4] iommu/arm-smmu-v3-test: Add nested s1bypass coverage Nicolin Chen
2025-12-06 12:34 ` Shuai Xue
2025-12-06 19:42 ` Jason Gunthorpe
2025-12-06 19:50 ` Nicolin Chen
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