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[35.187.245.222]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c6e197d63besm2542439a12.16.2026.02.11.08.59.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Feb 2026 08:59:31 -0800 (PST) Date: Wed, 11 Feb 2026 16:59:26 +0000 From: Pranjal Shrivastava To: Prakash Gupta Cc: Robin Murphy , Will Deacon , Joerg Roedel , Rob Clark , Connor Abbott , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Akhil P Oommen , Pratyush Brahma Subject: Re: [PATCH] iommu/arm-smmu: Use pm_runtime in fault handlers Message-ID: References: <20260127-smmu-rpm-v1-1-2ef2f4c85305@oss.qualcomm.com> <9fb8f661-a235-4f86-bc10-f80a21a8fa9d@arm.com> <00fcbcf2-3f48-410d-88a3-88dc834c1ed7@oss.qualcomm.com> <7720d215-9f92-4f0f-83af-c992e1cbe531@oss.qualcomm.com> <53c051f3-3a72-4d8d-917e-3b9d1537443e@oss.qualcomm.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <53c051f3-3a72-4d8d-917e-3b9d1537443e@oss.qualcomm.com> On Wed, Feb 11, 2026 at 09:40:29PM +0530, Prakash Gupta wrote: > > > On 2/10/2026 6:45 PM, Pranjal Shrivastava wrote: > > On Tue, Feb 10, 2026 at 04:39:56PM +0530, Prakash Gupta wrote: > >> > >> > >> On 2/3/2026 1:44 AM, Pranjal Shrivastava wrote: > >>> On Wed, Jan 28, 2026 at 06:44:35PM +0000, Robin Murphy wrote: > >>>> [ +Pranjal as this might matter for v3 too... ] > >>>> > >>> > >>> Hi Robin, > >>> > >>> To weigh in from the arm-smmu-v3 side, we’ve attempted to address the > >>> "can of worms" regarding power races by leaning on these differences: > >>> > >>> - Threaded IRQs for PRI/Events: In the recent series[1], the PRI and > >>> event handlers are fully threaded. This allows us to call > >>> arm_smmu_rpm_get() safely, as the handler can sleep while waiting for > >>> the hardware to resume. > >>> > >>> - GERROR Handling: Since GERROR remains a hard IRQ, we handle any > >>> pending gerrors in the suspend callback before the SMMU actually > >>> powers down. Any GERROR interrupts received while the device was > >>> suspended are treated as spurious and ignored. > >>> > >>> Thanks, > >>> Praan > >> > >> [1] refer to case where SMMU state is not retained during smmu device > >> power down, this I think is equally applicable for both context and > >> global faults. > >> > >> Since the ARM SMMU runtime resume triggers a device reset, any pending > >> faults would be cleared during resume. Here the solution can be to > >> handle both global and context faults before allowing the SMMU device to > >> suspend. > >> With this approach, any hard or threaded IRQ scheduled after the SMMU > >> device has suspended can be safely ignored. > >> One concern I see is iommu fault reporting to clients while handling > >> fault during smmu device suspend. > > > > I believe by the time we've reached suspend it's safe to assume that all > > clients have been suspended. Thus, we could simply not report the error > > and instead scream by having a dev_warn_ratelimited about the situation. > > > > By reporting error I meant reporting the error to client with > report_iommu_fault(). I agree that if smmu device is being suspended the > dma devices should have suspended by now. If so, it should be safe to > just handle the fault excluding report_iommu_fault() in suspend path and > complete smmu device suspend. Will update in next patchset. > Yes, that's what I meant, since the client is likely suspended, we can't call report_iommu_fault() because the client might've registered a handler which touches some MMIO (accesses registers) while the client is suspended. Thus, if we see a fault during suspend, we could potentially log it at an appropriate level and not call report_iommu_fault().. Thanks, Praan > > > >> > >> Thanks, > >> Prakash > >> > >> [1] https://lore.kernel.org/all/20260126151157.3418145-9-praan@google.com/ > >> >