[PATCH] iommu/amd: Fix a stale comment about which legacy mode is user visible

[PATCH] iommu/amd: Fix a stale comment about which legacy mode is user visible

[Sean Christopherson]

Update a stale comment about which of the legacy modes is visible to the
user, i.e. can be forced via amd_iommu_intr=legacy.

Fixes: b74aa02d7a30 ("iommu/amd: Fix legacy interrupt remapping for x2APIC-enabled system")
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 drivers/iommu/amd/amd_iommu_types.h | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 23caea22f8dc..f7877abd0091 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -968,12 +968,13 @@ static inline int get_hpet_devid(int id)
 }
 
 enum amd_iommu_intr_mode_type {
+	/*
+	 * The legacy format mode is not visible to users to prevent the user
+	 * from crashing x2APIC systems, which for all intents and purposes
+	 * require 128-bit IRTEs.   The legacy format will be forced as needed
+	 * when hardware doesn't support 128-bit IRTEs.
+	 */
 	AMD_IOMMU_GUEST_IR_LEGACY,
-
-	/* This mode is not visible to users. It is used when
-	 * we cannot fully enable vAPIC and fallback to only support
-	 * legacy interrupt remapping via 128-bit IRTE.
-	 */
 	AMD_IOMMU_GUEST_IR_LEGACY_GA,
 	AMD_IOMMU_GUEST_IR_VAPIC,
 };

base-commit: ea9bd29a9c0d757b3384ae3e633e6bbaddf00725
-- 
2.49.0.rc1.451.g8f38331e32-goog

Re: [PATCH] iommu/amd: Fix a stale comment about which legacy mode is user visible

[Sean Christopherson]

On Fri, Mar 14, 2025, Sean Christopherson wrote:
> Update a stale comment about which of the legacy modes is visible to the
> user, i.e. can be forced via amd_iommu_intr=legacy.
> 
> Fixes: b74aa02d7a30 ("iommu/amd: Fix legacy interrupt remapping for x2APIC-enabled system")
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
>  drivers/iommu/amd/amd_iommu_types.h | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
> index 23caea22f8dc..f7877abd0091 100644
> --- a/drivers/iommu/amd/amd_iommu_types.h
> +++ b/drivers/iommu/amd/amd_iommu_types.h
> @@ -968,12 +968,13 @@ static inline int get_hpet_devid(int id)
>  }
>  
>  enum amd_iommu_intr_mode_type {
> +	/*
> +	 * The legacy format mode is not visible to users to prevent the user
> +	 * from crashing x2APIC systems, which for all intents and purposes
> +	 * require 128-bit IRTEs.   The legacy format will be forced as needed
> +	 * when hardware doesn't support 128-bit IRTEs.
> +	 */
>  	AMD_IOMMU_GUEST_IR_LEGACY,
> -
> -	/* This mode is not visible to users. It is used when
> -	 * we cannot fully enable vAPIC and fallback to only support
> -	 * legacy interrupt remapping via 128-bit IRTE.
> -	 */
>  	AMD_IOMMU_GUEST_IR_LEGACY_GA,
>  	AMD_IOMMU_GUEST_IR_VAPIC,
>  };
> 
> base-commit: ea9bd29a9c0d757b3384ae3e633e6bbaddf00725
> -- 

High latency ping!  A year later, and this still applies cleanly :-)

Re: [PATCH] iommu/amd: Fix a stale comment about which legacy mode is user visible

[Wei Wang]

On 4/7/26 7:03 AM, Sean Christopherson wrote:
> On Fri, Mar 14, 2025, Sean Christopherson wrote:
>> Update a stale comment about which of the legacy modes is visible to the
>> user, i.e. can be forced via amd_iommu_intr=legacy.
>>
>> Fixes: b74aa02d7a30 ("iommu/amd: Fix legacy interrupt remapping for x2APIC-enabled system")
>> Signed-off-by: Sean Christopherson <seanjc@google.com>
>> ---
>>   drivers/iommu/amd/amd_iommu_types.h | 11 ++++++-----
>>   1 file changed, 6 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
>> index 23caea22f8dc..f7877abd0091 100644
>> --- a/drivers/iommu/amd/amd_iommu_types.h
>> +++ b/drivers/iommu/amd/amd_iommu_types.h
>> @@ -968,12 +968,13 @@ static inline int get_hpet_devid(int id)
>>   }
>>   
>>   enum amd_iommu_intr_mode_type {
>> +	/*
>> +	 * The legacy format mode is not visible to users to prevent the user
>> +	 * from crashing x2APIC systems, which for all intents and purposes
>> +	 * require 128-bit IRTEs.   The legacy format will be forced as needed

Nit: Triple space before "The"

>> +	 * when hardware doesn't support 128-bit IRTEs.
>> +	 */
>>   	AMD_IOMMU_GUEST_IR_LEGACY,
>> -
>> -	/* This mode is not visible to users. It is used when
>> -	 * we cannot fully enable vAPIC and fallback to only support
>> -	 * legacy interrupt remapping via 128-bit IRTE.
>> -	 */
>>   	AMD_IOMMU_GUEST_IR_LEGACY_GA,
>>   	AMD_IOMMU_GUEST_IR_VAPIC,
>>   };
>>
>> base-commit: ea9bd29a9c0d757b3384ae3e633e6bbaddf00725
>> -- 
> 
> High latency ping!  A year later, and this still applies cleanly :-)
> 

The change looks good to me:
Reviewed-by: Wei Wang <wei.w.wang@hotmail.com>


I think it's nicer to improve the kernel-parameters.txt as well:

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 03a550630644..68f7cdb606aa 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -459,7 +459,9 @@ Kernel parameters
         amd_iommu_intr= [HW,X86-64]
                         Specifies one of the following AMD IOMMU interrupt
                         remapping modes:
-                       legacy     - Use legacy interrupt remapping mode.
+                       legacy     - Use legacy (hypervisor-intercepted) interrupt
+                                    remapping mode. On modern systems, this safely
+                                    uses 128-bit IRTEs to support x2APIC.
                         vapic      - Use virtual APIC mode, which allows IOMMU
                                      to inject interrupts directly into guest.
                                      This mode requires kvm-amd.avic=1.