Re: [PATCH v4 09/10] iommu/arm-smmu-v3: Remove ASID/VMID from arm_smmu_domain

[Nicolin Chen <nicolinc@nvidia.com>]

On Fri, Apr 10, 2026 at 08:25:00PM -0300, Jason Gunthorpe wrote:
> On Fri, Apr 10, 2026 at 03:06:32PM -0700, Nicolin Chen wrote:
> > On Thu, Apr 09, 2026 at 09:27:34PM -0300, Jason Gunthorpe wrote:
> > > On Thu, Mar 19, 2026 at 12:51:55PM -0700, Nicolin Chen wrote:
> > By taking a closer look, I think either the arm_smmu_domain_inv call
> > above or any concurrent arm_smmu_mm_arch_invalidate_secondary_tlbs
> > call is a NOP now?
> 
> That sounds right, with all the changes there should be no cache
> flushing on the free path since it is now always flushed on detach, so
> the arm_smmu_domain_inv() should be deleted here too.

Yea, I did that.

> > We reworked the ASID lifecycle, which now ends when the last device
> > detaches. So, ASID was free-ed in arm_smmu_iotlb_tag_free() that did
> > a per-ASID flush also.
> 
> Yes, so the comment is:
> 
>  Notice that the arm_smmu_mm_arch_invalidate_secondary_tlbs() op can
>  still be called/running at this point. Like the normal detach flow
>  the RCU protected ASID may still experiance harmless invalidation.
>  However unlike normal domains the SVA invalidation will continue
>  into free until the mmu_notifier_put().

I updated that in my words but this reads more accurate. I will
use this (fixing the typo experiance).

Thanks
Nicolin