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[34.38.181.8]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48e53907a00sm99399225e9.12.2026.05.07.02.26.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 02:26:14 -0700 (PDT) Date: Thu, 7 May 2026 09:26:10 +0000 From: Mostafa Saleh To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Jonathan Hunter , Joerg Roedel , linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, Robin Murphy , Thierry Reding , Krishna Reddy , Will Deacon , David Matlack , Pasha Tatashin , patches@lists.linux.dev, Samiullah Khawaja Subject: Re: [PATCH 0/9] Remove SMMUv3 struct arm_smmu_cmdq_ent Message-ID: References: <0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> On Fri, May 01, 2026 at 11:29:09AM -0300, Jason Gunthorpe wrote: > [ This is part of the patch pile to move SMMUv3 over to the generic page > table: > 1) Introduction of new gather items and RISCV usage > https://patch.msgid.link/r/0-v1-54e7264d71b4+17cc3-iommu_riscv_inv_jgg@nvidia.com > 2) Remove SMMUv3 struct arm_smmu_cmdq_ent > 3) Organize the SMMUv3 invalidation flow so iommupt can use it > 4) Use the generic iommu page table for SMMUv3 > > The whole branch is here: > https://github.com/jgunthorpe/linux/commits/iommu_pt_arm64/ > ] > > The invalidation logic has this multi-step process where it first > writes the command into a 32 byte struct arm_smmu_cmdq_ent, then it > calls a function which converts it into a 16 byte HW struct, and > sometimes it then edits the HW struct a little bit before passing it > off to the batch or submission functions. > > Instead just generate the HW struct directly by moving the FIELD_PREP > blocks out of the big case statement and into helper functions. Call the > right function in all the places that were building arm_smmu_cmdq_ent. > > Add a type for the CMDQ entry similar to the STE/CD types that wraps the > two u64s for clarity and use it everywhere. > > This is intended to have no functional change. It makes the following > patches work better and removes a bunch of LOC. I've run several AI tools > with instruction to look for functional changes, which did find one subtle > mistake in PRI response. > > The removal of arm_smmu_cmdq_build_cmd() also achieves what Mostafa is > doing in the pkvm series by making the command formation entirely header > based with the arm_smmu_make_cmd_*() mini inlines. I was able to rebase my pKVM series on top of this and it works fine with just the helpers in the headers, so splitting of the build command is not needed anymore for pKVM. I also did test the whole series with just the upstream kernel on my Lenovo setup. Tested-by: Mostafa Saleh Thanks, Mostafa > This series has no dependencies. Several people have already tested this > on various ARM systems along with the full iommupt conversion. > > Jason Gunthorpe (9): > iommu/arm-smmu-v3: Add struct arm_smmu_cmd to represent the HW format > command > iommu/arm-smmu-v3: Use the HW arm_smmu_cmd in cmdq selection functions > iommu/arm-smmu-v3: Use the HW arm_smmu_cmd in cmdq submission > functions > iommu/arm-smmu-v3: Convert arm_smmu_cmdq_batch cmds to struct > arm_smmu_cmd > iommu/arm-smmu-v3: Remove CMDQ_OP_CFGI_CD_ALL from > arm_smmu_cmdq_build_cmd() > iommu/arm-smmu-v3: Directly encode simple commands > iommu/arm-smmu-v3: Directly encode CMDQ_OP_ATC_INV > iommu/arm-smmu-v3: Directly encode CMDQ_OP_SYNC > iommu/arm-smmu-v3: Directly encode TLBI commands > > .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 24 +- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 475 +++++++----------- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 248 +++++---- > .../iommu/arm/arm-smmu-v3/tegra241-cmdqv.c | 16 +- > 4 files changed, 350 insertions(+), 413 deletions(-) > > > base-commit: 1338d1bd1ea27bfe2cd1c4494547d409016a6644 > -- > 2.43.0 >