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[34.83.46.153]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2f88847502fsm28400768eec.14.2026.05.13.11.48.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 May 2026 11:48:30 -0700 (PDT) Date: Wed, 13 May 2026 18:48:26 +0000 From: Samiullah Khawaja To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Joerg Roedel , Robin Murphy , Will Deacon , Alejandro Jimenez , Lu Baolu , Joerg Roedel , Josua Mayer , Kevin Tian , Pasha Tatashin , patches@lists.linux.dev, Pranjal Shrivastava , Mostafa Saleh , stable@vger.kernel.org Subject: Re: [PATCH rc 4/5] iommupt: Check for missing PAGE_SIZE in the pgsize_bitmap Message-ID: References: <0-v1-44b2fef88b25+d3-iommupt_map_rc_jgg@nvidia.com> <4-v1-44b2fef88b25+d3-iommupt_map_rc_jgg@nvidia.com> <20260513180607.GC787748@nvidia.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <20260513180607.GC787748@nvidia.com> On Wed, May 13, 2026 at 03:06:07PM -0300, Jason Gunthorpe wrote: >On Wed, May 13, 2026 at 05:57:13PM +0000, Samiullah Khawaja wrote: >> On Wed, May 13, 2026 at 05:46:22PM +0000, Samiullah Khawaja wrote: >> > On Tue, May 12, 2026 at 01:46:16PM -0300, Jason Gunthorpe wrote: >> > > Sashiko pointed out that the driver could drop PAGE_SIZE from the >> > > pgsize_bitmap. That is technically allowed but nothing does it, and >> > > such an iommu_domain would not be used with the DMA API today. >> > > >> > > Still, it is against the design and it is trivial to fix up. Lift >> > > the PT_WARN_ON to the if branch and just skip the fast path. >> > > >> > > Fixes: dcd6a011a8d5 ("iommupt: Add map_pages op") >> > > Signed-off-by: Jason Gunthorpe >> > > --- >> > > drivers/iommu/generic_pt/iommu_pt.h | 4 ++-- >> > > 1 file changed, 2 insertions(+), 2 deletions(-) >> > > >> > > diff --git a/drivers/iommu/generic_pt/iommu_pt.h b/drivers/iommu/generic_pt/iommu_pt.h >> > > index 19b6daf88f2ab1..4877b05291c9d4 100644 >> > > --- a/drivers/iommu/generic_pt/iommu_pt.h >> > > +++ b/drivers/iommu/generic_pt/iommu_pt.h >> > > @@ -920,8 +920,8 @@ static int NS(map_range)(struct pt_iommu *iommu_table, dma_addr_t iova, >> > > return ret; >> > > >> > > /* Calculate target page size and level for the leaves */ >> > > - if (pt_has_system_page_size(common) && len == PAGE_SIZE) { >> > > - PT_WARN_ON(!(pgsize_bitmap & PAGE_SIZE)); >> > > + if (pt_has_system_page_size(common) && len == PAGE_SIZE && >> > > + likely(pgsize_bitmap & PAGE_SIZE)) { >> > > if (log2_mod(iova | paddr, PAGE_SHIFT)) >> > > return -ENXIO; >> >> After thought nit: >> >> I wonder if the error handling of iova and paddr alignment should also >> be deferred to non-fast path? Basically lift the iova and paddr check >> in the parent if? > >That would break support for < PAGE_SIZE tables which I've tried to I was also thinking about support of < PAGE_SIZE tables and wondering whether the < PAGE_SIZE tables support is already broken. For examples consider following: iova = 0x12341800 paddr = 0x56781800 len = PAGE_SIZE (4k) But pt_has_system_page_size() will be false in such a system. >keep generic support for. Similar checks already exist in the generic >code in a more general way, probably the first is >pt_compute_best_pgsize(). I was suggesting to rely on the already existing checks in pt_compute_best_pgsize() to do error handling, by only entering fast path if iova and paddr are also aligned. > >Thanks, >Jason No change needed. Putting this here again: Reviewed-by: Samiullah Khawaja Thanks, Sami