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[34.142.255.199]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2bf23915adcsm115280955ad.0.2026.06.01.21.01.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Jun 2026 21:01:49 -0700 (PDT) Date: Tue, 2 Jun 2026 04:01:43 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: iommu@lists.linux.dev, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Joerg Roedel , Suravee Suthikulpanit , Vasant Hegde , Ankit Soni , Bjorn Helgaas , Samiullah Khawaja , sashiko-bot@kernel.org Subject: Re: [PATCH 2/6] iommu/amd: Clear DTE with update_dte256 in iommu_ignore_device() Message-ID: References: <20260601134204.2150602-1-praan@google.com> <20260601134204.2150602-3-praan@google.com> <20260601141956.GQ3195266@nvidia.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260601141956.GQ3195266@nvidia.com> On Mon, Jun 01, 2026 at 11:19:56AM -0300, Jason Gunthorpe wrote: > On Mon, Jun 01, 2026 at 01:42:00PM +0000, Pranjal Shrivastava wrote: > > The iommu_ignore_device() function currently uses memset() to clear > > the Device Table Entry (DTE), which risks torn writes because the > > hardware reads DTEs as atomic 256-bit qwords. Fix this by using > > update_dte256() to perform a hardware-safe atomic clear when a live > > dev_data entry is available. > > > > Fixes: 99fc4ac3d297 ("iommu/amd: Introduce per PCI segment alias_table") > > Reported-by: sashiko-bot@kernel.org > > Closes: https://lore.kernel.org/all/20260529153216.2AD1E1F00899@smtp.kernel.org/ > > Signed-off-by: Pranjal Shrivastava > > --- > > drivers/iommu/amd/iommu.c | 11 ++++++++++- > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c > > index a94de66a885e..9b5861e241d7 100644 > > --- a/drivers/iommu/amd/iommu.c > > +++ b/drivers/iommu/amd/iommu.c > > @@ -750,7 +750,16 @@ static void iommu_ignore_device(struct amd_iommu *iommu, struct device *dev) > > setup_aliases(iommu, dev); > > > > pci_seg->rlookup_table[devid] = NULL; > > - memset(&dev_table[devid], 0, sizeof(struct dev_table_entry)); > > + > > + /* Clear DTE if we have a live entry */ > > + if (dev_data) { > > + struct dev_table_entry new = {}; > > + > > + amd_iommu_make_clear_dte(dev_data, &new); > > + update_dte256(iommu, dev_data, &new); > > + } else { > > + memset(&dev_table[devid], 0, sizeof(struct dev_table_entry)); > > + } > > This seems a little weird, an ignored device shouldn't have a dev_data > really, or it will soon be freed. > > I think you are better to replace the memset with a dedicated function > > /* Cannot not be used on a probe'd device with a live dev_data */ > disable_dte(..) > { > struct dev_table_entry new = {}; > > write_dte_lower128(ptr, new); > write_dte_upper128(ptr, new); > } > > And then this new ordering breaks the clone_aliases flow, it was > supposed to copy the 0 from the current DTE to the aliases.. Ack.. I'll fix it. Thanks, Praan