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[34.124.168.21]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-38fb30a43a6sm3840095a91.12.2026.08.03.04.11.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 04:11:20 -0700 (PDT) Date: Mon, 3 Aug 2026 11:11:14 +0000 From: Pranjal Shrivastava To: Prakash Gupta Cc: Will Deacon , Robin Murphy , Joerg Roedel , Rob Clark , Connor Abbott , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Akhil P Oommen , Pratyush Brahma Subject: Re: [PATCH v3] iommu/arm-smmu: Use pm_runtime in fault handlers Message-ID: References: <20260630-smmu-rpm-v3-1-f69874a580fa@oss.qualcomm.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260630-smmu-rpm-v3-1-f69874a580fa@oss.qualcomm.com> On Tue, Jun 30, 2026 at 02:32:46PM +0530, Prakash Gupta wrote: Hi Prakash, > Commit d4a44f0750bb ("iommu/arm-smmu: Invoke pm_runtime across the driver") > enabled pm_runtime for the arm-smmu device. On systems where the SMMU > sits in a power domain, all register accesses must be done while the > device is runtime active to avoid unclocked register reads and > potential NoC errors. > > So far, this has not been an issue for most SMMU clients because > stall-on-fault is enabled by default. While a translation fault is > being handled, the SMMU stalls further translations for that context > bank, so the fault handler would not race with a powered-down SMMU. > > Adreno SMMU now disables stall-on-fault in the presence of fault > storms to avoid saturating SMMU resources and hanging the GMU. With > stall-on-fault disabled, the SMMU can generate faults while its power > domain may no longer be enabled, which makes unclocked accesses to > fault-status registers in the SMMU fault handlers possible. > > Guard the context and global fault handlers with > arm_smmu_rpm_get_if_active() and arm_smmu_rpm_put() so that all SMMU > fault register accesses are done with the SMMU powered. If the SMMU is > not runtime active, the fault can be safely ignored as > arm_smmu_device_reset() clears fault registers on resume. > > Additionally, disable fault reporting in arm_smmu_runtime_suspend() > before powering down. pm_runtime_get_if_active() returns 0 during > RPM_SUSPENDING, so without this, level-triggered fault interrupts would > cause an interrupt storm while the device is being suspended. > arm_smmu_device_reset() re-enables fault reporting on resume. > > Fixes: b13044092c1e ("drm/msm: Temporarily disable stall-on-fault after a page fault") > Co-developed-by: Pratyush Brahma > Signed-off-by: Pratyush Brahma > Signed-off-by: Prakash Gupta > --- > Changes in v3: > - Add arm_smmu_rpm_get_if_active() wrapper that returns 1 when pm_runtime > is disabled, ensuring fault handlers work on non-pm_runtime systems > - Disable fault reporting in arm_smmu_runtime_suspend() before powering > down to prevent interrupt storms during RPM_SUSPENDING state > - Use pm_runtime_put_autosuspend() in arm_smmu_rpm_put() instead of > private __pm_runtime_put_autosuspend() > - Link to v2: https://patch.msgid.link/20260313-smmu-rpm-v2-1-8c2236b402b0@oss.qualcomm.com > > Changes in v2: > - Switched from arm_smmu_rpm_get()/arm_smmu_rpm_put() wrappers to > pm_runtime_get_if_active()/pm_runtime_put_autosuspend() APIs > - Added support for smmu->impl->global_fault callback in global fault handler > - Remove threaded irq context fault restriction to allow modifying stall > mode for adreno smmu > - Link to v1: https://patch.msgid.link/20260127-smmu-rpm-v1-1-2ef2f4c85305@oss.qualcomm.com > --- > drivers/iommu/arm/arm-smmu/arm-smmu.c | 92 +++++++++++++++++++++++++---------- > 1 file changed, 67 insertions(+), 25 deletions(-) > [...] This version looks fine to me, Reviewed-by: Pranjal Shrivastava Thanks, Praan