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[34.142.211.105]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a4f44d0a30sm753405a91.16.2026.09.30.13.00.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 13:00:38 -0700 (PDT) Date: Wed, 30 Sep 2026 20:00:31 +0000 From: Pranjal Shrivastava To: Nicolin Chen Cc: iommu@lists.linux.dev, Will Deacon , Joerg Roedel , Robin Murphy , Jason Gunthorpe , Mostafa Saleh , Daniel Mentz , Ashish Mhetre , linux-arm-kernel@lists.infradead.org, Thomas Gleixner , Radu Rendec , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Greg Kroah-Hartman , rafael@kernel.org, Danilo Krummrich , driver-core@lists.linux.dev, Jason Gunthorpe Subject: Re: [PATCH v11 10/16] iommu/arm-smmu-v3: Factor out arm_smmu_handle_gerror() Message-ID: References: <20260929034510.2023173-1-praan@google.com> <20260929034510.2023173-11-praan@google.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Sep 30, 2026 at 11:34:40AM -0700, Nicolin Chen wrote: > On Tue, Sep 29, 2026 at 03:45:04AM +0000, Pranjal Shrivastava wrote: > > The GERROR register's state might be lost when the SMMU is powered down > > during runtime suspend, requiring the suspend sequence to handle any > > pending errors before the hardware state is lost. > > > > Refactor the gerror handling logic into a helper function. Subsequent > > patches will invoke it from the runtime suspend callback after disabling > > the SMMU, ensuring that any late-breaking gerrors are logged and ack'ed > > before the hardware state is lost. > > CMDQV has a separate IRQ, so I think it likely needs a counterpart. > > I have a similar patch in one of my series: > https://lore.kernel.org/linux-iommu/16ae24cc2a002802b990afa1a69fe4ceab1e0da2.1790188510.git.nicolinc@nvidia.com/ > > Mine only handles CMDQ error though.. > I'll add a counterpart to arm_smmu_handle_gerror() in v12, I'll factor out the body of tegra241_cmdqv_isr() into something like tegra241_cmdqv_handle_errors() (bailing out early if VINTF_ERR_MAP is clear, so we don't warn on every suspend). The new impl->suspend op would call it after draining the lvcmdqs, with cmdqv->irq disabled around it, right before hw_deinit(vintf0). Since yours is for the CMD_SYNC timeout path, I'll keep this independent? WDYT? Praan