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Wed, 1 Jul 2020 19:31:25 +0000 Subject: Re: [PATCH v8 2/3] dt-bindings: arm-smmu: Add binding for Tegra194 SMMU To: Krishna Reddy , Robin Murphy References: <20200630001051.12350-1-vdumpa@nvidia.com> <20200630001051.12350-3-vdumpa@nvidia.com> <3e655881-bac4-f083-44ed-cfa0a61298d0@arm.com> <0d4f46d6-6a4e-bca0-bcf3-0e22a950e57b@nvidia.com> From: Jon Hunter Message-ID: Date: Wed, 1 Jul 2020 20:31:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) Content-Language: en-US DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1593631840; bh=ZGC9lIP7pPgpxF+KbHUwdguRxLIBieIt7a3FT6LfKBE=; h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date: User-Agent:MIME-Version:In-Reply-To:X-Originating-IP: X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=CvLLE1I/rFJiMNetZpFnz4yrdJ2p2ysI4goElMGZaDmeIVvVfVkPcE6W+6+if3Sfy hgHM/wd7JR6WiVc/L/HA8spH+rxaX2jlJiDy/BEej5nmfxCUuyIeZTU23xMEzZa+gz HOGByhGzv3+Pz7ZCoHeWiT9zamCpZCj8ZaJ51zSIgFJzlXRr9XLOgnzvwkroR2XR2c P8AfxVYUtxDd1I1+oE1pR3gWEwJhDFEfEC/+xUo8pl6K1i42OiM/yeI7PvPJ8l7hz7 pgv9UdvRpVXBpNklXhs5oy5hBb3hr5wC1/MtI7j556F/XMpXMuqH8JyTP0SqvcNqjv xnRkIjOcIvwhw== Cc: Sachin Nikam , "nicoleotsuka@gmail.com" , Mikko Perttunen , Bryan Huntsman , "linux-kernel@vger.kernel.org" , Pritesh Raithatha , Timo Alho , "iommu@lists.linux-foundation.org" , Nicolin Chen , "linux-tegra@vger.kernel.org" , Yu-Huan Hsu , Thierry Reding , "will@kernel.org" , "linux-arm-kernel@lists.infradead.org" , Bitan Biswas X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On 01/07/2020 20:00, Krishna Reddy wrote: >>>>> + items: >>>>> + - enum: >>>>> + - nvdia,tegra194-smmu >>>>> + - const: arm,mmu-500 >>> >>>> Is the fallback compatible appropriate here? If software treats this as a standard MMU-500 it will only program the first instance (because the second isn't presented as a separate MMU-500) - is there any way that isn't going to blow up? >>> >>> When compatible is set to both nvidia,tegra194-smmu and arm,mmu-500, implementation override ensure that both instances are programmed. Isn't it? I am not sure I follow your comment fully. > >> The problem is, if for some reason someone had a Tegra194, but only set the compatible string to 'arm,mmu-500' it would assume that it was a normal arm,mmu-500 and only one instance would be programmed. We always want at least 2 of the 3 instances >programmed and so we should only match 'nvidia,tegra194-smmu'. In fact, I think that we also need to update the arm_smmu_of_match table to add 'nvidia,tegra194-smmu' with the data set to &arm_mmu500. > > In that case, new binding "nvidia,smmu-v2" can be added with data set to &arm_mmu500 and enumeration would have nvidia,tegra194-smmu and another variant for next generation SoC in future. I think you would be better off with nvidia,smmu-500 as smmu-v2 appears to be something different. I see others have a smmu-v2 but I am not sure if that is legacy. We have an smmu-500 and so that would seem more appropriate. Jon -- nvpublic _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu