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From: Tom Lendacky <thomas.lendacky@amd.com>
To: Alexey Kardashevskiy <aik@amd.com>, linux-kernel@vger.kernel.org
Cc: linux-crypto@vger.kernel.org, John Allen <john.allen@amd.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	Ashish Kalra <ashish.kalra@amd.com>,
	Joerg Roedel <joro@8bytes.org>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	"Borislav Petkov (AMD)" <bp@alien8.de>,
	Kim Phillips <kim.phillips@amd.com>,
	Jerry Snitselaar <jsnitsel@redhat.com>,
	Vasant Hegde <vasant.hegde@amd.com>,
	Jason Gunthorpe <jgg@ziepe.ca>,
	Gao Shiyuan <gaoshiyuan@baidu.com>,
	Sean Christopherson <seanjc@google.com>,
	Nikunj A Dadhania <nikunj@amd.com>,
	Michael Roth <michael.roth@amd.com>,
	Amit Shah <amit.shah@amd.com>, Peter Gonda <pgonda@google.com>,
	iommu@lists.linux.dev
Subject: Re: [PATCH kernel v2 4/5] crypto: ccp: Enable SEV-TIO feature in the PSP when supported
Date: Mon, 1 Dec 2025 08:31:45 -0600	[thread overview]
Message-ID: <b5d1dd97-4e76-461f-91b5-864de2157b3f@amd.com> (raw)
In-Reply-To: <20251121080629.444992-5-aik@amd.com>

On 11/21/25 02:06, Alexey Kardashevskiy wrote:
> The PSP advertises the SEV-TIO support via the FEATURE_INFO command
> advertised via SNP_PLATFORM_STATUS.
> 
> The BIOS advertises the SEV-TIO enablement via the IOMMU EFR2 register
> (added in an earlier patch).
> 
> Enable SEV-TIO during the SNP_INIT_EX call if both the PSP and the BIOS
> advertise support for it.
> 
> Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
> ---
>  include/linux/psp-sev.h      |  4 +++-
>  drivers/crypto/ccp/sev-dev.c | 10 +++++++++-
>  2 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h
> index 34a25209f909..c0c817ca3615 100644
> --- a/include/linux/psp-sev.h
> +++ b/include/linux/psp-sev.h
> @@ -750,7 +750,8 @@ struct sev_data_snp_init_ex {
>  	u32 list_paddr_en:1;
>  	u32 rapl_dis:1;
>  	u32 ciphertext_hiding_en:1;
> -	u32 rsvd:28;
> +	u32 tio_en:1;
> +	u32 rsvd:27;
>  	u32 rsvd1;
>  	u64 list_paddr;
>  	u16 max_snp_asid;
> @@ -850,6 +851,7 @@ struct snp_feature_info {
>  } __packed;
>  
>  #define SNP_CIPHER_TEXT_HIDING_SUPPORTED	BIT(3)
> +#define SNP_SEV_TIO_SUPPORTED			BIT(1) /* EBX */
>  
>  #ifdef CONFIG_CRYPTO_DEV_SP_PSP
>  
> diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c
> index 9e0c16b36f9c..2f1c9614d359 100644
> --- a/drivers/crypto/ccp/sev-dev.c
> +++ b/drivers/crypto/ccp/sev-dev.c
> @@ -1358,6 +1358,11 @@ static int snp_filter_reserved_mem_regions(struct resource *rs, void *arg)
>  	return 0;
>  }
>  
> +static bool sev_tio_present(struct sev_device *sev)
> +{
> +	return (sev->snp_feat_info_0.ebx & SNP_SEV_TIO_SUPPORTED) != 0;
> +}
> +
>  static int __sev_snp_init_locked(int *error, unsigned int max_snp_asid)
>  {
>  	struct psp_device *psp = psp_master;
> @@ -1434,6 +1439,8 @@ static int __sev_snp_init_locked(int *error, unsigned int max_snp_asid)
>  		data.init_rmp = 1;
>  		data.list_paddr_en = 1;
>  		data.list_paddr = __psp_pa(snp_range_list);
> +		data.tio_en = sev_tio_present(sev) &&
> +			amd_iommu_sev_tio_supported();

Align amd_iommu_sev_tio_supported() with sev_tio_present() or just make
a single line. But...

I would move the IOMMU check into the sev_tio_present() function and
then rename sev_tio_present() to sev_tio_supported() unless
sev_tio_present() is going to be used more somewhere else?

Those can be follow-up patches, though, if this needs to get into 6.19.

Thanks,
Tom

>  		cmd = SEV_CMD_SNP_INIT_EX;
>  	} else {
>  		cmd = SEV_CMD_SNP_INIT;
> @@ -1471,7 +1478,8 @@ static int __sev_snp_init_locked(int *error, unsigned int max_snp_asid)
>  
>  	snp_hv_fixed_pages_state_update(sev, HV_FIXED);
>  	sev->snp_initialized = true;
> -	dev_dbg(sev->dev, "SEV-SNP firmware initialized\n");
> +	dev_dbg(sev->dev, "SEV-SNP firmware initialized, SEV-TIO is %s\n",
> +		data.tio_en ? "enabled" : "disabled");
>  
>  	dev_info(sev->dev, "SEV-SNP API:%d.%d build:%d\n", sev->api_major,
>  		 sev->api_minor, sev->build);


  reply	other threads:[~2025-12-01 14:31 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-21  8:06 [PATCH kernel v2 0/5] PCI/TSM: Enabling core infrastructure on Alexey Kardashevskiy
2025-11-21  8:06 ` [PATCH kernel v2 1/5] ccp: Make snp_reclaim_pages and __sev_do_cmd_locked public Alexey Kardashevskiy
2025-11-21  8:06 ` [PATCH kernel v2 2/5] psp-sev: Assign numbers to all status codes and add new Alexey Kardashevskiy
2025-11-21  8:06 ` [PATCH kernel v2 3/5] iommu/amd: Report SEV-TIO support Alexey Kardashevskiy
2025-11-21  8:06 ` [PATCH kernel v2 4/5] crypto: ccp: Enable SEV-TIO feature in the PSP when supported Alexey Kardashevskiy
2025-12-01 14:31   ` Tom Lendacky [this message]
2025-11-21  8:06 ` [PATCH kernel v2 5/5] crypto/ccp: Implement SEV-TIO PCIe IDE (phase1) Alexey Kardashevskiy
2025-12-01  4:56   ` Aithal, Srikanth
2025-12-01 15:23   ` Tom Lendacky
2025-12-02  2:04     ` Alexey Kardashevskiy
2025-12-02 14:24       ` Tom Lendacky
2025-11-22  3:35 ` [PATCH kernel v2 0/5] PCI/TSM: Enabling core infrastructure on Alexey Kardashevskiy
2025-11-25 14:17   ` Joerg Roedel
2025-11-25 20:38 ` dan.j.williams
2025-11-26  8:38   ` Joerg Roedel
2025-12-01 15:27   ` Tom Lendacky
2025-12-01 20:40     ` dan.j.williams

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