From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9131410EF for ; Thu, 8 Jun 2023 03:38:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686195491; x=1717731491; h=message-id:date:mime-version:cc:subject:to:references: from:in-reply-to:content-transfer-encoding; bh=5qPHntbywk3JpKVN534ugygboJcvwxaIHXdHw6nEyFI=; b=n44dVgTnzyFlx9Ch8/XktQe94CnfaN+v3IXlNRj2yUlOA2w6uZDypwt4 v3r1k5ZcvboLXpw9VpyKmv8Ij0iPgD/t5IC7TLQ/ECZ9fgR/PJ66IFgqn 9W3zklz4U7FI84FtbN+j+4T7EgTY0WYd+0Bk9H+DknIyMq07sl+FuhD1y 7jlUeiQz7MgJ2DC1jV0CMMVLZGas8XcfdctFmzEgka7CPZL8hNIdaCcMG 9UwJuDJVLGR0JwB+96De4hru2AdPa5WGgOsX4I+PrL2rvsBM1DbOCI+9e 6ive0TgMKMAyaEd/qZXUtrMqG2P1BHZyxKaH35p894gafjTVQQSUt2BbQ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10734"; a="341846146" X-IronPort-AV: E=Sophos;i="6.00,226,1681196400"; d="scan'208";a="341846146" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2023 20:38:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10734"; a="779710455" X-IronPort-AV: E=Sophos;i="6.00,226,1681196400"; d="scan'208";a="779710455" Received: from allen-box.sh.intel.com (HELO [10.239.159.127]) ([10.239.159.127]) by fmsmga004.fm.intel.com with ESMTP; 07 Jun 2023 20:38:05 -0700 Message-ID: Date: Thu, 8 Jun 2023 11:37:05 +0800 Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Cc: baolu.lu@linux.intel.com, "cohuck@redhat.com" , "eric.auger@redhat.com" , "nicolinc@nvidia.com" , "kvm@vger.kernel.org" , "mjrosato@linux.ibm.com" , "chao.p.peng@linux.intel.com" , "yi.y.sun@linux.intel.com" , "peterx@redhat.com" , "jasowang@redhat.com" , "shameerali.kolothum.thodi@huawei.com" , "lulu@redhat.com" , "suravee.suthikulpanit@amd.com" , "iommu@lists.linux.dev" , "linux-kernel@vger.kernel.org" , "linux-kselftest@vger.kernel.org" , "Duan, Zhenzhong" , Jacob Pan Subject: Re: [PATCH v3 04/10] iommu/vt-d: Add helper to setup pasid nested translation To: "Liu, Yi L" , "Tian, Kevin" , "joro@8bytes.org" , "alex.williamson@redhat.com" , "jgg@nvidia.com" , "robin.murphy@arm.com" References: <20230511145110.27707-1-yi.l.liu@intel.com> <20230511145110.27707-5-yi.l.liu@intel.com> <6fbf021b-5f53-0290-d565-f9e765b51f88@linux.intel.com> Content-Language: en-US From: Baolu Lu In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 6/8/23 11:35 AM, Liu, Yi L wrote: >> From: Baolu Lu >> Sent: Friday, May 26, 2023 12:16 PM >> On 5/24/23 3:16 PM, Tian, Kevin wrote: >>>> From: Yi Liu >>>> Sent: Thursday, May 11, 2023 10:51 PM >>>> >>>> + /* >>>> + * Memory type is only applicable to devices inside processor >>>> coherent >>>> + * domain. Will add MTS support once coherent devices are available. >>>> + */ >>>> + if (s1_cfg->flags & IOMMU_VTD_PGTBL_MTS_MASK) { >>>> + pr_warn_ratelimited("No memory type support %s\n", >>>> + iommu->name); >>>> + return -EINVAL; >>>> + } >>> If it's unsupported why exposing them in the uAPI at this point? >> Agreed. We can remove this flag for now. > So we shall remove the below flags in uapi as well, is it? > > +#define IOMMU_VTD_PGTBL_MTS_MASK (IOMMU_VTD_PGTBL_CD | \ > + IOMMU_VTD_PGTBL_EMTE | \ > + IOMMU_VTD_PGTBL_PCD | \ > + IOMMU_VTD_PGTBL_PWT) I suppose so. Best regards, baolu