From: Vasant Hegde <vasant.hegde@amd.com>
To: iommu@lists.linux.dev, joro@8bytes.org
Cc: will@kernel.org, robin.murphy@arm.com,
suravee.suthikulpanit@amd.com,
Amandeep Kaur Longia <AmandeepKaur.Longia@amd.com>
Subject: Re: [PATCH] iommu/amd: Add SNP page mode 0 support
Date: Thu, 23 Jul 2026 14:16:37 +0530 [thread overview]
Message-ID: <d7ba7ef4-cea1-4a2e-84ba-a0fb85af2824@amd.com> (raw)
In-Reply-To: <20260723084332.11008-1-vasant.hegde@amd.com>
On 7/23/2026 2:13 PM, Vasant Hegde wrote:
> Newer AMD IOMMUs supports DTE[Mode]=0 for SNP-enabled system. This is
> detected using new feature bit (EFR2[SNP_Page_Mode_0_Sup]). If this
> feature is enabled, then IOMMU supports:
> - Passthrough mode (i.e. iommu=pt)
> - amd_iommu=pgtbl_v2: Forcing Linux DMA-API to use IOMMU v2 page table
> - Setting up device for SVA mode in the host.
>
> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
> Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> Tested-by: Amandeep Kaur Longia <AmandeepKaur.Longia@amd.com>
Missed to mention. This patch applies on top of
https://lore.kernel.org/linux-iommu/20260723061548.10187-1-vasant.hegde@amd.com/T/#t
-Vasant
prev parent reply other threads:[~2026-07-23 8:46 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-23 8:43 [PATCH] iommu/amd: Add SNP page mode 0 support Vasant Hegde
2026-07-23 8:46 ` Vasant Hegde [this message]
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