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From: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Sricharan <sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	mathieu.poirier-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	will.deacon-5wv7dgnIgG8@public.gmane.org,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH V2 1/3] iommu/arm-smmu: Add pm_runtime/sleep ops
Date: Wed, 8 Feb 2017 14:30:46 +0000	[thread overview]
Message-ID: <db9bc01c-635d-1a57-8a6c-9be19a0cda16@arm.com> (raw)
In-Reply-To: <20170208135252.GF15459@leverpostej>

On 08/02/17 13:52, Mark Rutland wrote:
> On Wed, Feb 08, 2017 at 07:15:37PM +0530, Sricharan wrote:
>>> Clocks are not architectural, so it only makes sense to associate them
>>> with an implementation-specific compatible string. There's also no
>>
>> ok, it for this the QCOM specific implementation binding is tried(going to).
>>
>>> guarantee that different microarchitectures have equivalent internal
>>> clock domains - I'm not sure if "the SMMU's underlying bus access" is
>>> meant to refer to accesses *by* the SMMU, i.e. page table walks,
>>> accesses *through* the SMMU by upstream masters, or both
>>
>> In the above QCOM case, it is actually both. Its the same path for both the
>> page table walker and upstream masters.

Right, that's what I feared. As far as I can make out the current ARM
implementations, transactions passing through will require at least
TBUn_BCLK for the appropriate TBU, but would also need the page table
walker clocked with CCLK to resolve TLB misses. But then the programming
interface is also in the CCLK domain (not counting the incoming APB or
AXI clock for the actual slave port itself). Thus this 'generic' clock
binding already isn't compatible with MMU-40x/500.

>>> differences are rather significant. I'd also note that an MMU-500
>>> configuration may have up to *33* clocks.
>>>
>>> Either way, the QCOM implementation deserves its own compatible if only
>>> for the sake of the imp-def gaps in the architecture (e.g. FSR.SS
>>> behaviour WRT to IRQs as touched upon in the other thread).
>>>
>>
>> Ok, slightly unclear, so you mean then *clocks* are not good enough reason
>> to have a new compatible ?
> 
> I beleive Robin's point was even if the clocks didn't matter, there are
> other reasons we should have the QCOM-specific compatible string.
> 
> So we should have one regardless.

Exactly.

Robin.

> 
> Thanks,
> Mark.
> 

  reply	other threads:[~2017-02-08 14:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-02 17:10 [PATCH V2 0/3] iommu/arm-smmu: Add runtime pm/sleep support Sricharan R
2017-02-02 17:10 ` [PATCH V2 2/3] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device Sricharan R
     [not found] ` <1486055420-19671-1-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-02-02 17:10   ` [PATCH V2 1/3] iommu/arm-smmu: Add pm_runtime/sleep ops Sricharan R
     [not found]     ` <1486055420-19671-2-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-02-02 17:42       ` Mark Rutland
2017-02-08 10:53         ` Sricharan
2017-02-08 11:40           ` Mark Rutland
2017-02-08 12:30             ` Sricharan
2017-02-08 12:54               ` Robin Murphy
     [not found]                 ` <b55359d8-2665-aef0-3215-53a0e8f21bcd-5wv7dgnIgG8@public.gmane.org>
2017-02-08 13:45                   ` Sricharan
2017-02-08 13:52                     ` Mark Rutland
2017-02-08 14:30                       ` Robin Murphy [this message]
     [not found]                         ` <db9bc01c-635d-1a57-8a6c-9be19a0cda16-5wv7dgnIgG8@public.gmane.org>
2017-02-09 13:35                           ` Sricharan
2017-02-02 17:10   ` [PATCH V2 3/3] iommu/arm-smmu: Add the device_link between masters and smmu Sricharan R

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