From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 718762D73BA for ; Wed, 15 Oct 2025 15:55:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760543725; cv=none; b=BKMGwFlNH6FYp+zN/Dqv1RhEVO2CGF+XBfrcagmipjrwH8RGWP7WnxZe8AmsuW3yHPU+shA4Ug3Y/L9SsQlkvwXRKnjcguqINYTZEEuLdklogbPncRh9/H9D+hyr3u0IeTl9yTzd9S3Yh43GYQvbVWiiIyEd29h9kCUtihhbCVs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760543725; c=relaxed/simple; bh=S9yNFLTbhi4KQGgGfnRYFdCq2kVd6d+5069UHhBhEIQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=HATkjNAYSIVh0hT0VlVdLt84w5sMirMc2DE1vEUKYOYOkclqmeSyFFIZTWna4Y+iAx3Kd6sa8Aaq8p81RBBFkDl3OPFt3RPHxngXWJJ7vJqS0kXFc7bGCJVoJZFLymqvuEjZN2j2Av109iVuFpAJH5FPkjnyOgMsoyiv/LGEQf8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OfuwfWAs; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OfuwfWAs" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1760543724; x=1792079724; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=S9yNFLTbhi4KQGgGfnRYFdCq2kVd6d+5069UHhBhEIQ=; b=OfuwfWAssvu+VHZoJpI/9TFcJVNHScQmiLtKfaWT+AFbG244O/0dj/DC CA/eloBaMJWrvUHvWIEMQH39du4NkhmcfLQ2zOKfI8pPKzH0rNHjkcqcT hK5v6C2IXNOSOEmT42xY9Kmzp6VEmEOwD+5toy524xuPoUTqi9d5Al2sX AzyEtnsZkS3+w9ZjvqPvUOUSEWywFT4i6mLKsu32kTH5zs7VMk6CsidCq rXvmxf+BThfHUfpnyMobffDRbrdjfUSpmuEJIIHcbnsIigkUF7TZVGVlb buaS7H01y5/FZ4CzTrKhww7UcWX5i8E+bpT4Wl2LNLVtJIFKnzsgX17jx A==; X-CSE-ConnectionGUID: ySXmG3Y2Qt+ereDdbEPj4Q== X-CSE-MsgGUID: 3i1MeAwQSLuzh6xWW0XrNg== X-IronPort-AV: E=McAfee;i="6800,10657,11583"; a="88191013" X-IronPort-AV: E=Sophos;i="6.19,231,1754982000"; d="scan'208";a="88191013" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2025 08:55:23 -0700 X-CSE-ConnectionGUID: BODiAZaRQcaYxfgzQJiLGw== X-CSE-MsgGUID: DxN9gEAKSyeFdMCQtcw0Dg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,231,1754982000"; d="scan'208";a="213156431" Received: from ldmartin-desk2.corp.intel.com (HELO [10.125.111.202]) ([10.125.111.202]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2025 08:55:22 -0700 Message-ID: Date: Wed, 15 Oct 2025 08:55:21 -0700 Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 0/7] Fix stale IOTLB entries for kernel address space To: Baolu Lu , Andrew Morton Cc: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Jason Gunthorpe , Jann Horn , Vasant Hegde , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Alistair Popple , Peter Zijlstra , Uladzislau Rezki , Jean-Philippe Brucker , Andy Lutomirski , Yi Lai , David Hildenbrand , Lorenzo Stoakes , "Liam R . Howlett" , Vlastimil Babka , Mike Rapoport , Michal Hocko , Matthew Wilcox , iommu@lists.linux.dev, security@kernel.org, x86@kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org References: <20251014130437.1090448-1-baolu.lu@linux.intel.com> <20251014174339.c7b7d2cfb9f60d225e4fe5ec@linux-foundation.org> <6b187b20-6017-4f85-93ac-529d5df33aa2@linux.intel.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; keydata= xsFNBE6HMP0BEADIMA3XYkQfF3dwHlj58Yjsc4E5y5G67cfbt8dvaUq2fx1lR0K9h1bOI6fC oAiUXvGAOxPDsB/P6UEOISPpLl5IuYsSwAeZGkdQ5g6m1xq7AlDJQZddhr/1DC/nMVa/2BoY 2UnKuZuSBu7lgOE193+7Uks3416N2hTkyKUSNkduyoZ9F5twiBhxPJwPtn/wnch6n5RsoXsb ygOEDxLEsSk/7eyFycjE+btUtAWZtx+HseyaGfqkZK0Z9bT1lsaHecmB203xShwCPT49Blxz VOab8668QpaEOdLGhtvrVYVK7x4skyT3nGWcgDCl5/Vp3TWA4K+IofwvXzX2ON/Mj7aQwf5W iC+3nWC7q0uxKwwsddJ0Nu+dpA/UORQWa1NiAftEoSpk5+nUUi0WE+5DRm0H+TXKBWMGNCFn c6+EKg5zQaa8KqymHcOrSXNPmzJuXvDQ8uj2J8XuzCZfK4uy1+YdIr0yyEMI7mdh4KX50LO1 pmowEqDh7dLShTOif/7UtQYrzYq9cPnjU2ZW4qd5Qz2joSGTG9eCXLz5PRe5SqHxv6ljk8mb ApNuY7bOXO/A7T2j5RwXIlcmssqIjBcxsRRoIbpCwWWGjkYjzYCjgsNFL6rt4OL11OUF37wL QcTl7fbCGv53KfKPdYD5hcbguLKi/aCccJK18ZwNjFhqr4MliQARAQABzUVEYXZpZCBDaHJp c3RvcGhlciBIYW5zZW4gKEludGVsIFdvcmsgQWRkcmVzcykgPGRhdmUuaGFuc2VuQGludGVs LmNvbT7CwXgEEwECACIFAlQ+9J0CGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJEGg1 lTBwyZKwLZUP/0dnbhDc229u2u6WtK1s1cSd9WsflGXGagkR6liJ4um3XCfYWDHvIdkHYC1t MNcVHFBwmQkawxsYvgO8kXT3SaFZe4ISfB4K4CL2qp4JO+nJdlFUbZI7cz/Td9z8nHjMcWYF IQuTsWOLs/LBMTs+ANumibtw6UkiGVD3dfHJAOPNApjVr+M0P/lVmTeP8w0uVcd2syiaU5jB aht9CYATn+ytFGWZnBEEQFnqcibIaOrmoBLu2b3fKJEd8Jp7NHDSIdrvrMjYynmc6sZKUqH2 I1qOevaa8jUg7wlLJAWGfIqnu85kkqrVOkbNbk4TPub7VOqA6qG5GCNEIv6ZY7HLYd/vAkVY E8Plzq/NwLAuOWxvGrOl7OPuwVeR4hBDfcrNb990MFPpjGgACzAZyjdmYoMu8j3/MAEW4P0z F5+EYJAOZ+z212y1pchNNauehORXgjrNKsZwxwKpPY9qb84E3O9KYpwfATsqOoQ6tTgr+1BR CCwP712H+E9U5HJ0iibN/CDZFVPL1bRerHziuwuQuvE0qWg0+0SChFe9oq0KAwEkVs6ZDMB2 P16MieEEQ6StQRlvy2YBv80L1TMl3T90Bo1UUn6ARXEpcbFE0/aORH/jEXcRteb+vuik5UGY 5TsyLYdPur3TXm7XDBdmmyQVJjnJKYK9AQxj95KlXLVO38lczsFNBFRjzmoBEACyAxbvUEhd GDGNg0JhDdezyTdN8C9BFsdxyTLnSH31NRiyp1QtuxvcqGZjb2trDVuCbIzRrgMZLVgo3upr MIOx1CXEgmn23Zhh0EpdVHM8IKx9Z7V0r+rrpRWFE8/wQZngKYVi49PGoZj50ZEifEJ5qn/H Nsp2+Y+bTUjDdgWMATg9DiFMyv8fvoqgNsNyrrZTnSgoLzdxr89FGHZCoSoAK8gfgFHuO54B lI8QOfPDG9WDPJ66HCodjTlBEr/Cwq6GruxS5i2Y33YVqxvFvDa1tUtl+iJ2SWKS9kCai2DR 3BwVONJEYSDQaven/EHMlY1q8Vln3lGPsS11vSUK3QcNJjmrgYxH5KsVsf6PNRj9mp8Z1kIG qjRx08+nnyStWC0gZH6NrYyS9rpqH3j+hA2WcI7De51L4Rv9pFwzp161mvtc6eC/GxaiUGuH BNAVP0PY0fqvIC68p3rLIAW3f97uv4ce2RSQ7LbsPsimOeCo/5vgS6YQsj83E+AipPr09Caj 0hloj+hFoqiticNpmsxdWKoOsV0PftcQvBCCYuhKbZV9s5hjt9qn8CE86A5g5KqDf83Fxqm/ vXKgHNFHE5zgXGZnrmaf6resQzbvJHO0Fb0CcIohzrpPaL3YepcLDoCCgElGMGQjdCcSQ+Ci FCRl0Bvyj1YZUql+ZkptgGjikQARAQABwsFfBBgBAgAJBQJUY85qAhsMAAoJEGg1lTBwyZKw l4IQAIKHs/9po4spZDFyfDjunimEhVHqlUt7ggR1Hsl/tkvTSze8pI1P6dGp2XW6AnH1iayn yRcoyT0ZJ+Zmm4xAH1zqKjWplzqdb/dO28qk0bPso8+1oPO8oDhLm1+tY+cOvufXkBTm+whm +AyNTjaCRt6aSMnA/QHVGSJ8grrTJCoACVNhnXg/R0g90g8iV8Q+IBZyDkG0tBThaDdw1B2l asInUTeb9EiVfL/Zjdg5VWiF9LL7iS+9hTeVdR09vThQ/DhVbCNxVk+DtyBHsjOKifrVsYep WpRGBIAu3bK8eXtyvrw1igWTNs2wazJ71+0z2jMzbclKAyRHKU9JdN6Hkkgr2nPb561yjcB8 sIq1pFXKyO+nKy6SZYxOvHxCcjk2fkw6UmPU6/j/nQlj2lfOAgNVKuDLothIxzi8pndB8Jju KktE5HJqUUMXePkAYIxEQ0mMc8Po7tuXdejgPMwgP7x65xtfEqI0RuzbUioFltsp1jUaRwQZ MTsCeQDdjpgHsj+P2ZDeEKCbma4m6Ez/YWs4+zDm1X8uZDkZcfQlD9NldbKDJEXLIjYWo1PH hYepSffIWPyvBMBTW2W5FRjJ4vLRrJSUoEfJuPQ3vW9Y73foyo/qFoURHO48AinGPZ7PC7TF vUaNOTjKedrqHkaOcqB185ahG2had0xnFsDPlx5y In-Reply-To: <6b187b20-6017-4f85-93ac-529d5df33aa2@linux.intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10/14/25 22:38, Baolu Lu wrote: > On 10/15/25 08:43, Andrew Morton wrote: >>> This solution introduces a deferred freeing mechanism for kernel page >>> table pages, which provides a safe window to notify the IOMMU to >>> invalidate its caches before the page is reused. >> >> Thanks for working on this. >> >> Can we expect any performance impact from this?  Have any measurements >> been performed? > > This change only defers page table page freeing, allows for batch- > freeing of page table pages, and notifies the IOMMU driver to invalidate > the related caches. It doesn't impose any overhead in any critical path; > therefore, I don't see any potential performance impact. Thankfully, freeing kernel page tables just isn't a common operation. It's also done right next to a big fat flush_tlb_kernel_range() which is going to IPI the whole world. So I'd expect this new gunk to be in the noise behind all those IPIs. We should double check that 0day has had a go at this series and hasn't found anything. But other than that, I don't think we need to do any specific performance testing on it. >> Only [7/7] has a cc:stable, even though that patch is not at all >> backportable.  Please give some thought and suggestions regarding >> whether you think we should backport this into earlier kernels. > > Yes. We should backport this series to stable kernels. > >> If "yes" then the size and scope of the series looks problematic.  Is >> it possible to put together something simple and expedient just to plug >> the hole in older kernels? > > Squashing some patches is one way. But would it be workable to backport > this series manually? Say, could we send a pull request to the stable > mailing list after this series has landed? I honestly think we should just disable SVA in old kernels at compile time, or at least default it to be disabled at runtime. That's the simplest thing. The other alternative is to have arch_vmap_pmd_supported() return false when SVA is active, or maybe when it's supported on the platform. Either of those are 10-ish lines of code and easy to backport.