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b=HLusyKLg5LhCfCQJiynPnaFEI1jAuybAxW2/i5DKUFyAEqhPdF+uod5uox4rlNJfuMer7ByzkJzPow/78MLVJsdOqaXbpLfnlKOss2jdt+eWQM5FQ4ATSlGSCZEyfGsPKqfgz7X3pSo0aOmoo6v+VbXjPBimqAlDW00BShJBCtX2/UCsqGn78uHMTRvsnVU3xcWI2JCy4njoj6xzYiDoWvFrpR8c5WB2VBxS2xMDgmo/JzKkrEg7/3TXEGY53GNsY7JGv0faoYAbXeZCcdqEU066bWx674PvDIhM/2itCIFJOR/BDGzRmCe8t8WsD0iq6V1S3CbT3O2myuc6eKQQnA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from CO6PR12MB5444.namprd12.prod.outlook.com (2603:10b6:5:35e::8) by DM4PR12MB6374.namprd12.prod.outlook.com (2603:10b6:8:a3::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7409.43; Fri, 12 Apr 2024 16:29:38 +0000 Received: from CO6PR12MB5444.namprd12.prod.outlook.com ([fe80::ae68:3461:c09b:e6e3]) by CO6PR12MB5444.namprd12.prod.outlook.com ([fe80::ae68:3461:c09b:e6e3%5]) with mapi id 15.20.7409.053; Fri, 12 Apr 2024 16:29:38 +0000 Message-ID: <0a2bd45c-294b-4665-b2f9-40ff01e2640a@nvidia.com> Date: Fri, 12 Apr 2024 17:29:32 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 11/18] drm/msm: generate headers on the fly To: Dmitry Baryshkov Cc: Masahiro Yamada , Nathan Chancellor , Nicolas Schier , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , linux-kbuild@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, "linux-tegra@vger.kernel.org" References: <20240401-fd-xml-shipped-v5-0-4bdb277a85a1@linaro.org> <20240401-fd-xml-shipped-v5-11-4bdb277a85a1@linaro.org> <05d99785-f8b7-4aae-85e2-db74a4e3017a@nvidia.com> From: Jon Hunter Content-Language: en-US In-Reply-To: Content-Type: text/plain; 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This removes a >>> need to push register changes to Mesa with the following manual >>> synchronization step. Existing headers will be removed in the following >>> commits (split away to ease reviews). >>> >>> Signed-off-by: Dmitry Baryshkov >>> --- >>> drivers/gpu/drm/msm/.gitignore | 1 + >>> drivers/gpu/drm/msm/Makefile | 97 +++++++++++++++++++++++++++++++++--------- >>> 2 files changed, 77 insertions(+), 21 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/msm/.gitignore b/drivers/gpu/drm/msm/.gitignore >>> new file mode 100644 >>> index 000000000000..9ab870da897d >>> --- /dev/null >>> +++ b/drivers/gpu/drm/msm/.gitignore >>> @@ -0,0 +1 @@ >>> +generated/ >>> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile >>> index 26ed4f443149..c861de58286c 100644 >>> --- a/drivers/gpu/drm/msm/Makefile >>> +++ b/drivers/gpu/drm/msm/Makefile >>> @@ -1,10 +1,11 @@ >>> # SPDX-License-Identifier: GPL-2.0 >>> ccflags-y := -I $(srctree)/$(src) >>> +ccflags-y += -I $(obj)/generated >>> ccflags-y += -I $(srctree)/$(src)/disp/dpu1 >>> ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi >>> ccflags-$(CONFIG_DRM_MSM_DP) += -I $(srctree)/$(src)/dp >>> >>> -msm-y := \ >>> +adreno-y := \ >>> adreno/adreno_device.o \ >>> adreno/adreno_gpu.o \ >>> adreno/a2xx_gpu.o \ >>> @@ -18,7 +19,11 @@ msm-y := \ >>> adreno/a6xx_gmu.o \ >>> adreno/a6xx_hfi.o \ >>> >>> -msm-$(CONFIG_DRM_MSM_HDMI) += \ >>> +adreno-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ >>> + >>> +adreno-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o >>> + >>> +msm-display-$(CONFIG_DRM_MSM_HDMI) += \ >>> hdmi/hdmi.o \ >>> hdmi/hdmi_audio.o \ >>> hdmi/hdmi_bridge.o \ >>> @@ -31,7 +36,7 @@ msm-$(CONFIG_DRM_MSM_HDMI) += \ >>> hdmi/hdmi_phy_8x74.o \ >>> hdmi/hdmi_pll_8960.o \ >>> >>> -msm-$(CONFIG_DRM_MSM_MDP4) += \ >>> +msm-display-$(CONFIG_DRM_MSM_MDP4) += \ >>> disp/mdp4/mdp4_crtc.o \ >>> disp/mdp4/mdp4_dsi_encoder.o \ >>> disp/mdp4/mdp4_dtv_encoder.o \ >>> @@ -42,7 +47,7 @@ msm-$(CONFIG_DRM_MSM_MDP4) += \ >>> disp/mdp4/mdp4_kms.o \ >>> disp/mdp4/mdp4_plane.o \ >>> >>> -msm-$(CONFIG_DRM_MSM_MDP5) += \ >>> +msm-display-$(CONFIG_DRM_MSM_MDP5) += \ >>> disp/mdp5/mdp5_cfg.o \ >>> disp/mdp5/mdp5_cmd_encoder.o \ >>> disp/mdp5/mdp5_ctl.o \ >>> @@ -55,7 +60,7 @@ msm-$(CONFIG_DRM_MSM_MDP5) += \ >>> disp/mdp5/mdp5_plane.o \ >>> disp/mdp5/mdp5_smp.o \ >>> >>> -msm-$(CONFIG_DRM_MSM_DPU) += \ >>> +msm-display-$(CONFIG_DRM_MSM_DPU) += \ >>> disp/dpu1/dpu_core_perf.o \ >>> disp/dpu1/dpu_crtc.o \ >>> disp/dpu1/dpu_encoder.o \ >>> @@ -85,14 +90,16 @@ msm-$(CONFIG_DRM_MSM_DPU) += \ >>> disp/dpu1/dpu_vbif.o \ >>> disp/dpu1/dpu_writeback.o >>> >>> -msm-$(CONFIG_DRM_MSM_MDSS) += \ >>> +msm-display-$(CONFIG_DRM_MSM_MDSS) += \ >>> msm_mdss.o \ >>> >>> -msm-y += \ >>> +msm-display-y += \ >>> disp/mdp_format.o \ >>> disp/mdp_kms.o \ >>> disp/msm_disp_snapshot.o \ >>> disp/msm_disp_snapshot_util.o \ >>> + >>> +msm-y += \ >>> msm_atomic.o \ >>> msm_atomic_tracepoints.o \ >>> msm_debugfs.o \ >>> @@ -115,12 +122,12 @@ msm-y += \ >>> msm_submitqueue.o \ >>> msm_gpu_tracepoints.o \ >>> >>> -msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ >>> - dp/dp_debug.o >>> +msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o >>> >>> -msm-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o >>> +msm-display-$(CONFIG_DEBUG_FS) += \ >>> + dp/dp_debug.o >>> >>> -msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ >>> +msm-display-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ >>> dp/dp_catalog.o \ >>> dp/dp_ctrl.o \ >>> dp/dp_display.o \ >>> @@ -130,21 +137,69 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ >>> dp/dp_audio.o \ >>> dp/dp_utils.o >>> >>> -msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o >>> - >>> -msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o >>> +msm-display-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o >>> >>> -msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ >>> +msm-display-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ >>> dsi/dsi_cfg.o \ >>> dsi/dsi_host.o \ >>> dsi/dsi_manager.o \ >>> dsi/phy/dsi_phy.o >>> >>> -msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o >>> -msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o >>> -msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o >>> -msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o >>> -msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o >>> -msm-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o >>> +msm-display-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o >>> +msm-display-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o >>> +msm-display-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o >>> +msm-display-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o >>> +msm-display-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o >>> +msm-display-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o >>> + >>> +msm-y += $(adreno-y) $(msm-display-y) >>> >>> obj-$(CONFIG_DRM_MSM) += msm.o >>> + >>> +quiet_cmd_headergen = GENHDR $@ >>> + cmd_headergen = mkdir -p $(obj)/generated && $(PYTHON3) $(srctree)/$(src)/registers/gen_header.py --rnn $(srctree)/$(src)/registers --xml $< c-defines > $@ >>> + >>> +$(obj)/generated/%.xml.h: $(src)/registers/adreno/%.xml \ >>> + $(src)/registers/adreno/adreno_common.xml \ >>> + $(src)/registers/adreno/adreno_pm4.xml \ >>> + $(src)/registers/freedreno_copyright.xml \ >>> + $(src)/registers/gen_header.py \ >>> + $(src)/registers/rules-fd.xsd \ >>> + FORCE >>> + $(call if_changed,headergen) >>> + >>> +$(obj)/generated/%.xml.h: $(src)/registers/display/%.xml \ >>> + $(src)/registers/freedreno_copyright.xml \ >>> + $(src)/registers/gen_header.py \ >>> + $(src)/registers/rules-fd.xsd \ >>> + FORCE >>> + $(call if_changed,headergen) >>> + >>> +ADRENO_HEADERS = \ >>> + generated/a2xx.xml.h \ >>> + generated/a3xx.xml.h \ >>> + generated/a4xx.xml.h \ >>> + generated/a5xx.xml.h \ >>> + generated/a6xx.xml.h \ >>> + generated/a6xx_gmu.xml.h \ >>> + generated/adreno_common.xml.h \ >>> + generated/adreno_pm4.xml.h \ >>> + >>> +DISPLAY_HEADERS = \ >>> + generated/dsi_phy_7nm.xml.h \ >>> + generated/dsi_phy_10nm.xml.h \ >>> + generated/dsi_phy_14nm.xml.h \ >>> + generated/dsi_phy_20nm.xml.h \ >>> + generated/dsi_phy_28nm_8960.xml.h \ >>> + generated/dsi_phy_28nm.xml.h \ >>> + generated/dsi.xml.h \ >>> + generated/hdmi.xml.h \ >>> + generated/mdp4.xml.h \ >>> + generated/mdp5.xml.h \ >>> + generated/mdp_common.xml.h \ >>> + generated/sfpb.xml.h >>> + >>> +$(addprefix $(obj)/,$(adreno-y)): $(addprefix $(obj)/,$(ADRENO_HEADERS)) >>> +$(addprefix $(obj)/,$(msm-display-y)): $(addprefix $(obj)/,$(DISPLAY_HEADERS)) >>> + >>> +targets += $(ADRENO_HEADERS) $(DISPLAY_HEADERS) >> >> >> I noticed that some of our builders were failing to build the latest >> -next and it was after this commit that things broke. The builders >> have an older version of python3 and the gen_headers.py script fails >> in a couple places with syntax errors. The following changes >> resolved the issues for python 3.5 ... > > Could you please post them as a proper patch? Yes absolutely, I just wanted to get some feedback first in case there was anything I was overlooking. >> diff --git a/drivers/gpu/drm/msm/registers/gen_header.py b/drivers/gpu/drm/msm/registers/gen_header.py >> index 9b2842d4a354..90d5c2991d05 100644 >> --- a/drivers/gpu/drm/msm/registers/gen_header.py >> +++ b/drivers/gpu/drm/msm/registers/gen_header.py >> @@ -323,7 +323,7 @@ class Array(object): >> indices = [] >> if self.length != 1: >> if self.fixed_offsets: >> - indices.append((self.index_ctype(), None, f"__offset_{self.local_name}")) >> + indices.append((self.index_ctype(), None, "__offset_%s" % self.local_name)) >> else: >> indices.append((self.index_ctype(), self.stride, None)) >> return indices >> @@ -942,7 +942,8 @@ def main(): >> parser.add_argument('--rnn', type=str, required=True) >> parser.add_argument('--xml', type=str, required=True) >> >> - subparsers = parser.add_subparsers(required=True) >> + subparsers = parser.add_subparsers() >> + subparsers.required = True >> >> >> I know that anything before python 3.8 is now EOL, but I did see a >> similar thread on dri-devel [0] for supporting python 3.6 and so >> wanted to see if there is any objections to the above? > > I don't have any objections from my side. OK, great! Jon -- nvpublic