From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CAA226056D; Mon, 8 Dec 2025 20:28:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765225687; cv=none; b=d+dHHiLrBMiGRgTnrypxhlhPVa6MF5dqQS7v7Tqy64DGWNY9z7VPdXcDp3FuDlhyrSlrATlGhe4vEuembI0oyWEBwPdEtHE8wsXhlUQJkwE9SgGtXUdYv+LfCbH1qXO9fNVABAxmts7eNW7hGmnb4wT3K40NzR0JRPNAY0y5jpc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765225687; c=relaxed/simple; bh=YIXliSchTOGG+1D3mmfdvl+VICDaZKaTzDSnNx+OpKw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=CW2gyI8ypjI0lkE+Eidni43MS5rea9Oe7HXS7yYIHmQEb6kp4T2tZnJEFnLVC1VwKkWPdY74ONVfZp4AFdwF8p16utjn5LhEzig3ccNVMxbW3q1RJH9X+NLrK3zndL9CBsp0yC/E4/OnqujQQBckOl2nFC5e0mqLxKpoq9RbIOQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cKSQiL3F; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cKSQiL3F" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 96B46C4CEF1; Mon, 8 Dec 2025 20:28:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1765225686; bh=YIXliSchTOGG+1D3mmfdvl+VICDaZKaTzDSnNx+OpKw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cKSQiL3F7jbs9gE3oqTSJIXkLb7tk+tk91qixKYoK8qtGJAUSs5aJ9ePUjh2Qyia8 nHuumMDiLGW1aiPxpaKX3WZKl+PSFWJ2IZJf5qmM9A3ntp+DnWf4EWqg8Mt20FNsiV o/BElrDBTbH82vMlXrixaqJYwwWoybic9v8tQbVhKn8pHPN5/PLJU3eAYfXUA78Zi4 +tyZs8g1KoMMLqcFIe1M/jPs4Gp2QwLh9hKNINqnMoqyHy+KrNjxUG/R7NNuh/CfU2 gqOTAR3nA/ZFH8fqhudoLG513fmgCYvOOeMyYP8VijHvl6qcbVorCvBQWiAJErnTbN mrFyypLkTFIww== Date: Mon, 8 Dec 2025 14:28:03 -0600 From: Rob Herring To: Manivannan Sadhasivam Cc: Greg Kroah-Hartman , Jiri Slaby , Nathan Chancellor , Nicolas Schier , Hans de Goede , Ilpo =?iso-8859-1?Q?J=E4rvinen?= , Mark Pearson , "Derek J. Clark" , Manivannan Sadhasivam , Krzysztof Kozlowski , Conor Dooley , Marcel Holtmann , Luiz Augusto von Dentz , Bartosz Golaszewski , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, linux-kbuild@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-bluetooth@vger.kernel.org, linux-pm@vger.kernel.org, Stephan Gerhold , Dmitry Baryshkov Subject: Re: [PATCH v2 08/10] dt-bindings: connector: Add PCIe M.2 Mechanical Key E connector Message-ID: <20251208202803.GA2541017-robh@kernel.org> References: <20251125-pci-m2-e-v2-0-32826de07cc5@oss.qualcomm.com> <20251125-pci-m2-e-v2-8-32826de07cc5@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kbuild@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251125-pci-m2-e-v2-8-32826de07cc5@oss.qualcomm.com> On Tue, Nov 25, 2025 at 08:15:12PM +0530, Manivannan Sadhasivam wrote: > Add the devicetree binding for PCIe M.2 Mechanical Key E connector defined > in the PCI Express M.2 Specification, r4.0, sec 5.1.2. This connector > provides interfaces like PCIe or SDIO to attach the WiFi devices to the > host machine, USB or UART+PCM interfaces to attach the Bluetooth (BT) > devices along with additional interfaces like I2C for NFC solution. At any > point of time, the connector can only support either PCIe or SDIO as the > WiFi interface and USB or UART as the BT interface. AFAICT, there's no muxing of interfaces. Maybe that's a defacto limitation on x86 systems? There's no reason to encode that into the binding if the pins aren't mux'ed on the connector. > > The connector provides a primary power supply of 3.3v, along with an > optional 1.8v VIO supply for the Adapter I/O buffer circuitry operating at > 1.8v sideband signaling. > > The connector also supplies optional signals in the form of GPIOs for fine > grained power management. > > Signed-off-by: Manivannan Sadhasivam > --- > .../bindings/connector/pcie-m2-e-connector.yaml | 178 +++++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 179 insertions(+) > > diff --git a/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml b/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml > new file mode 100644 > index 000000000000..fe2c9a943a21 > --- /dev/null > +++ b/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml > @@ -0,0 +1,178 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/connector/pcie-m2-e-connector.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: PCIe M.2 Mechanical Key E Connector > + > +maintainers: > + - Manivannan Sadhasivam > + > +description: > + A PCIe M.2 E connector node represents a physical PCIe M.2 Mechanical Key E > + connector. Mechanical Key E connectors are used to connect Wireless > + Connectivity devices including combinations of Wi-Fi, BT, NFC to the host > + machine over interfaces like PCIe/SDIO, USB/UART+PCM, and I2C. > + > +properties: > + compatible: > + const: pcie-m2-e-connector > + > + vpcie3v3-supply: > + description: A phandle to the regulator for 3.3v supply. > + > + vpcie1v8-supply: > + description: A phandle to the regulator for VIO 1.8v supply. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + description: OF graph bindings modeling the interfaces exposed on the > + connector. Since a single connector can have multiple interfaces, every > + interface has an assigned OF graph port number as described below. > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/properties/port > + description: Connector interfaces for Wi-Fi > + > + properties: > + endpoint@0: > + $ref: /schemas/graph.yaml#/properties/endpoint > + description: PCIe interface > + > + endpoint@1: > + $ref: /schemas/graph.yaml#/properties/endpoint > + description: SDIO interface > + > + anyOf: > + - required: > + - endpoint@0 > + - required: > + - endpoint@1 > + > + port@1: > + $ref: /schemas/graph.yaml#/properties/port > + description: Connector interfaces for BT > + > + properties: > + endpoint@0: > + $ref: /schemas/graph.yaml#/properties/endpoint > + description: USB 2.0 interface > + > + endpoint@1: > + $ref: /schemas/graph.yaml#/properties/endpoint > + description: UART interface > + > + anyOf: > + - required: > + - endpoint@0 > + - required: > + - endpoint@1 > + > + port@2: > + $ref: /schemas/graph.yaml#/properties/port > + description: PCM/I2S interface Does this work with any existing DAI bindings? Or conflict with the audio graph card binding? > + > + port@3: > + $ref: /schemas/graph.yaml#/properties/port > + description: I2C interface Like the other one, use i2c-parent. > + > + oneOf: > + - required: > + - port@0 > + > + clocks: > + description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to > + the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for > + more details. > + maxItems: 1 > + > + w-disable1-gpios: > + description: GPIO controlled connection to W_DISABLE1# signal. This signal > + is used by the system to disable WiFi radio in the M.2 card. Refer, PCI > + Express M.2 Specification r4.0, sec 3.1.12.3 for more details. > + maxItems: 1 > + > + w-disable2-gpios: > + description: GPIO controlled connection to W_DISABLE2# signal. This signal > + is used by the system to disable BT radio in the M.2 card. Refer, PCI > + Express M.2 Specification r4.0, sec 3.1.12.3 for more details. > + maxItems: 1 > + > + viocfg-gpios: > + description: GPIO controlled connection to IO voltage configuration > + (VIO_CFG) signal. This signal is used by the M.2 card to indicate to the > + host system that the card supports an independent IO voltage domain for > + the sideband signals. Refer, PCI Express M.2 Specification r4.0, sec > + 3.1.15.1 for more details. > + maxItems: 1 > + > + uim-power-src-gpios: > + description: GPIO controlled connection to UIM_POWER_SRC signal. This signal > + is used when the NFC solution is implemented and receives the power output > + from WWAN_UIM_PWR signal of the another WWAN M.2 card. Refer, PCI Express > + M.2 Specification r4.0, sec 3.1.11.1 for more details. > + maxItems: 1 > + > + uim-power-snk-gpios: > + description: GPIO controlled connection to UIM_POWER_SNK signal. This signal > + is used when the NFC solution is implemented and supplies power to the > + Universal Integrated Circuit Card (UICC). Refer, PCI Express M.2 > + Specification r4.0, sec 3.1.11.2 for more details. > + maxItems: 1 > + > + uim-swp-gpios: > + description: GPIO controlled connection to UIM_SWP signal. This signal is > + used when the NFC solution is implemented and implements the Single Wire > + Protocol (SWP) interface to the UICC. Refer, PCI Express M.2 Specification > + r4.0, sec 3.1.11.3 for more details. > + maxItems: 1 > + > +required: > + - compatible > + - vpcie3v3-supply > + > +additionalProperties: false > + > +examples: > + # PCI M.2 Key E connector for Wi-Fi/BT with PCIe/UART interfaces > + - | > + #include > + > + connector { > + compatible = "pcie-m2-e-connector"; > + vpcie3v3-supply = <&vreg_wcn_3p3>; > + vpcie1v8-supply = <&vreg_l15b_1p8>; > + w-disable1-gpios = <&tlmm 117 GPIO_ACTIVE_LOW>; > + w-disable2-gpios = <&tlmm 116 GPIO_ACTIVE_LOW>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + reg = <0>; > + > + endpoint@0 { > + reg = <0>; > + remote-endpoint = <&pcie4_port0_ep>; > + }; > + }; > + > + port@1 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + reg = <1>; > + > + endpoint@1 { > + reg = <1>; > + remote-endpoint = <&uart14_ep>; > + }; > + }; > + }; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 9b3f689d1f50..f707f29d0a37 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -20478,6 +20478,7 @@ PCIE M.2 POWER SEQUENCING > M: Manivannan Sadhasivam > L: linux-pci@vger.kernel.org > S: Maintained > +F: Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml > F: Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml > F: drivers/power/sequencing/pwrseq-pcie-m2.c > > > -- > 2.48.1 >