Re: [RFC PATCH v4 1/8] dt-bindings: bus: add CDX bus device tree bindings

Rob Herring
2022-10-14T14:17:41Z

On Fri, Oct 14, 2022 at 10:10:42AM +0530, Nipun Gupta wrote:
> This patch adds a devicetree binding documentation for CDX
> bus.

Please read submitting-patches.rst and what it says about commit
messages.

>
> Signed-off-by: Nipun Gupta <nipun.gupta@amd.com>
> ---
> .../devicetree/bindings/bus/xlnx,cdx.yaml | 65 +++++++++++++++++++
> MAINTAINERS | 6 ++
> 2 files changed, 71 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
>
> diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
> new file mode 100644
> index 000000000000..984ff65b668a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bus/xlnx,cdx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: AMD CDX bus controller
> +
> +description: |
> + CDX bus controller detects CDX devices using CDX firmware and
> + add those to cdx bus. The CDX bus manages multiple FPGA based
> + hardware devices, which can support network, crypto or any other
> + specialized type of devices. These FPGA based devices can be
> + added/modified dynamically on run-time.
> +
> + All devices on the CDX bus will have a unique streamid (for IOMMU)
> + and a unique device ID (for MSI) corresponding to a requestor ID
> + (one to one associated with the device). The streamid and deviceid
> + are used to configure SMMU and GIC-ITS respectively.
> +
> + iommu-map property is used to define the set of stream ids
> + corresponding to each device and the associated IOMMU.
> +
> + The MSI writes are accompanied by sideband data (Device ID).
> + The msi-map property is used to associate the devices with the
> + device ID as well as the associated ITS controller.
> +
> +maintainers:
> + - Nipun Gupta <nipun.gupta@amd.com>
> + - Nikhil Agarwal <nikhil.agarwal@amd.com>
> +
> +properties:
> + compatible:
> + const: xlnx,cdxbus-controller-1.0

Where does 1.0 come from?

> +
> + reg:
> + maxItems: 1
> +
> + iommu-map: true
> +
> + msi-map: true
> +
> +required:
> + - compatible
> + - reg
> + - iommu-map
> + - msi-map
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cdx: cdx@4000000 {

bus@...

> + compatible = "xlnx,cdxbus-controller-1.0";
> + reg = <0x00000000 0x04000000 0 0x1000>;
> + /* define map for RIDs 250-259 */
> + iommu-map = <250 &smmu 250 10>;
> + /* define msi map for RIDs 250-259 */
> + msi-map = <250 &its 250 10>;
> + };
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f5ca4aefd184..5f48f11fe0c3 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -935,6 +935,12 @@ S: Supported
> F: drivers/crypto/ccp/
> F: include/linux/ccp.h
>
> +AMD CDX BUS DRIVER
> +M: Nipun Gupta <nipun.gupta@amd.com>
> +M: Nikhil Agarwal <nikhil.agarwal@amd.com>
> +S: Maintained
> +F: Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
> +
> AMD CRYPTOGRAPHIC COPROCESSOR (CCP) DRIVER - SEV SUPPORT
> M: Brijesh Singh <brijesh.singh@amd.com>
> M: Tom Lendacky <thomas.lendacky@amd.com>
> --
> 2.25.1
>
>