Behaviour of kernel makefiles when entering a subdir using a config symbol = m

[Tomi Valkeinen <tomi.valkeinen@ti.com>]

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Hi,

I wonder if this is as designed, or a bug:

I have a makefile which has

obj-$(CONFIG_FOO) += foo/

In the foo directory, I have a makefile which has

obj-$(CONFIG_FOO_BAR) += bar.o

The values of the variables are

CONFIG_FOO=m
CONFIG_FOO_BAR=y

When building the kernel with the above setup, I would expect make to
enter the foo/ directory, and build 'bar.o' into the kernel image.

And make does enter the directory, and does compile 'bar.o', but I think
'bar.o' doesn't end up anywhere. At least it's not compiled into the
kernel image.

If CONFIG_FOO=y, then 'bar.o' will be built in to the kernel image.

Am I doing something wrong here?

 Tomi


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