Generating .cmd files without actually building the kernel?

Generating .cmd files without actually building the kernel?

[Anish Moorthy]

Does anyone know/have ideas on how to do this? I'd like to be able to
generate compile_commands.json and browse the kernel code without
having to build the whole thing.

It seems to me that the basic change/hack should be something like
[1]. But of course, it's not that simply just applying that patch and
then running "make defconfig; make" runs into an error pretty quickly

> $ make defconfig
> $ make
> ...
> ./scripts/basic/fixdep scripts/mod/.empty.o.d scripts/mod/empty.o '${GCC_COMMAND_HERE}' > scripts/mod/.empty.o.cmd; rm -f scripts/mod/.empty.o.d
>fixdep: error opening file: scripts/mod/.empty.o.d: No such file or directory
  HOSTCC  scripts/mod/mk_elfconfig
  MKELF   scripts/mod/elfconfig.h
> /bin/sh: line 1: scripts/mod/empty.o: No such file or directory
> make[2]: *** [scripts/mod/Makefile:25: scripts/mod/elfconfig.h] Error 1
> make[1]: *** [/usr/local/google/home/amoorthy/linux/Makefile:1271: prepare0] Error 2
> make: *** [Makefile:251: __sub-make] Error 2

I take it the gcc command itself is generating the .d files, which I
guess makes sense given the existence of gcc's -MF flag (though grep's
not good enough for me to figure out where we're setting thins). I
tried

> $ make CFLAGS="-E"

too under the theory that this would generate the .o.d files, but this
just dies elsewhere

>  exec-cmd.c:2:10: fatal error: linux/compiler.h: No such file or directory
    2 | #include <linux/compiler.h>
      |          ^~~~~~~~~~~~~~~~~~
> compilation terminated.

Anyways, I've spent a fair chunk of time trying to understand the
system at this point, but I'm really still just fumbling around:
figured I'd try asking for help.



[1]
diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index 8c311b997e24..a17cdfa7ab72 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -208,6 +208,10 @@ cmd_and_fixdep =
                           \
        $(objtree)/scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' >
$(dot-target).cmd;\
        rm -f $(depfile)

+savecmd_and_fixdep =
           \
+       $(objtree)/scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' >
$(dot-target).cmd;\
+       rm -f $(depfile)
+
 # Usage: $(call if_changed_rule,foo)
 # Will check if $(cmd_foo) or any of the prerequisites changed,
 # and if so will execute $(rule_foo).
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 4d543054f723..9fcb41f96d89 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -318,7 +318,7 @@ quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
                $(cmd_objtool)

 define rule_cc_o_c
-       $(call cmd_and_fixdep,cc_o_c)
+       $(call savecmd_and_fixdep,cc_o_c)
        $(call cmd,checksrc)
        $(call cmd,checkdoc)
        $(call cmd,gen_objtooldep)

Re: Generating .cmd files without actually building the kernel?

[Masahiro Yamada]

[-- Attachment #1: Type: text/plain, Size: 3741 bytes --]

On Sat, Jun 7, 2025 at 1:06 AM Anish Moorthy <amoorthy@google.com> wrote:
>
> Does anyone know/have ideas on how to do this? I'd like to be able to
> generate compile_commands.json and browse the kernel code without
> having to build the whole thing.


What a coincidence, I was also thinking about this.

Unlike ninja-build, Makefiles in Kbuild are not structured flat.

So, supporting dry-run mode needs several amendments everywhere,
(and it is not easily maintainable)
If interested, RFC exists. [1]

Of course, the complete dry-run is not desired here,
since we need to generate .*.cmd files at least.


I just proto-typed this and attached a patch.
The implementation is hacky, and I am not sure
if this should land in the main line.

Please let me know whether the attached patch works for you.



[1]: https://lore.kernel.org/linux-kbuild/20240819160309.2218114-1-vegard.nossum@oracle.com/




>
> It seems to me that the basic change/hack should be something like
> [1]. But of course, it's not that simply just applying that patch and
> then running "make defconfig; make" runs into an error pretty quickly
>
> > $ make defconfig
> > $ make
> > ...
> > ./scripts/basic/fixdep scripts/mod/.empty.o.d scripts/mod/empty.o '${GCC_COMMAND_HERE}' > scripts/mod/.empty.o.cmd; rm -f scripts/mod/.empty.o.d
> >fixdep: error opening file: scripts/mod/.empty.o.d: No such file or directory
>   HOSTCC  scripts/mod/mk_elfconfig
>   MKELF   scripts/mod/elfconfig.h
> > /bin/sh: line 1: scripts/mod/empty.o: No such file or directory
> > make[2]: *** [scripts/mod/Makefile:25: scripts/mod/elfconfig.h] Error 1
> > make[1]: *** [/usr/local/google/home/amoorthy/linux/Makefile:1271: prepare0] Error 2
> > make: *** [Makefile:251: __sub-make] Error 2
>
> I take it the gcc command itself is generating the .d files, which I
> guess makes sense given the existence of gcc's -MF flag (though grep's
> not good enough for me to figure out where we're setting thins). I
> tried
>
> > $ make CFLAGS="-E"
>
> too under the theory that this would generate the .o.d files, but this
> just dies elsewhere
>
> >  exec-cmd.c:2:10: fatal error: linux/compiler.h: No such file or directory
>     2 | #include <linux/compiler.h>
>       |          ^~~~~~~~~~~~~~~~~~
> > compilation terminated.
>
> Anyways, I've spent a fair chunk of time trying to understand the
> system at this point, but I'm really still just fumbling around:
> figured I'd try asking for help.
>
>
>
> [1]
> diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
> index 8c311b997e24..a17cdfa7ab72 100644
> --- a/scripts/Kbuild.include
> +++ b/scripts/Kbuild.include
> @@ -208,6 +208,10 @@ cmd_and_fixdep =
>                            \
>         $(objtree)/scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' >
> $(dot-target).cmd;\
>         rm -f $(depfile)
>
> +savecmd_and_fixdep =
>            \
> +       $(objtree)/scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' >
> $(dot-target).cmd;\
> +       rm -f $(depfile)
> +
>  # Usage: $(call if_changed_rule,foo)
>  # Will check if $(cmd_foo) or any of the prerequisites changed,
>  # and if so will execute $(rule_foo).
> diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
> index 4d543054f723..9fcb41f96d89 100644
> --- a/scripts/Makefile.lib
> +++ b/scripts/Makefile.lib
> @@ -318,7 +318,7 @@ quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
>                 $(cmd_objtool)
>
>  define rule_cc_o_c
> -       $(call cmd_and_fixdep,cc_o_c)
> +       $(call savecmd_and_fixdep,cc_o_c)
>         $(call cmd,checksrc)
>         $(call cmd,checkdoc)
>         $(call cmd,gen_objtooldep)
>


--
Best Regards
Masahiro Yamada

[-- Attachment #2: 0001-No-Merge-kbuild-support-dry-run-and-generating-compi.patch --]
[-- Type: text/x-patch, Size: 9401 bytes --]

From 8787e275fafd57ede4f03d75b742dcd4a9a304c8 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <masahiroy@kernel.org>
Date: Sat, 7 Jun 2025 20:19:29 +0900
Subject: [PATCH] [No-Merge]kbuild: support dry-run and generating
 compile_commands.json quickly (EXPERIMENTAL)

This patch implements experimental support for the dry-run mode.
When you pass V=3, Kbuild runs the dry-run mode, where Kbuild just
creates an empty target file for most rules.

The main motivation is to quickly generate compile_commands.json
without building the entire tree.

[Usage 1] dry-run allmodconfig

This is not so interesting, but you can get a quick idea
how many objects would be compiled with allmodconfig

  $ make clean
  $ make allmodconfig
  $ make -j$(nproc) V=3 all

[Usage 2] generate compile_commands.json quickly

  $ make clean
  $ make allmodconfig
  $ make -j$(nproc) V=3 compile_commands.json

   :CC [M]  drivers/hwmon/wm831x-hwmon.o
   :CC [M]  drivers/hwmon/wm8350-hwmon.o
   :CC [M]  drivers/hwmon/xgene-hwmon.o
   :LD [M]  drivers/iio/adc/xilinx-xadc.o
   :LD [M]  drivers/hwmon/nct6775.o
    AR      built-in.a
    AR      vmlinux.a
    GEN     compile_commands.json
  ============ NOTICE NOTICE NOTICE =============
  The dry-run mode (V=3) corrupts the build tree.
  Please run 'make clean' when you are done.
  ===============================================

Note:

 - The colon suffix : means the default behavior of the dry-run mode.
   Kbuild just created an empty target file instead of invoking the
   toolchain.

 - After using the dry-run mode, please run "make clean" because the
   build tree is already messed up; most of the objects are empty files
   but their timestamp are up-to-date. So, Kbuild cannot fix the tree
   without "make clean"

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
---
 Makefile                   | 15 ++++++++++++++-
 kernel/Makefile            |  1 +
 scripts/Kbuild.include     | 17 ++++++++++++++---
 scripts/Makefile.build     |  3 +++
 scripts/Makefile.modpost   |  3 ++-
 scripts/Makefile.vmlinux   |  1 +
 scripts/Makefile.vmlinux_o |  1 +
 7 files changed, 36 insertions(+), 5 deletions(-)

diff --git a/Makefile b/Makefile
index 35e6e5240c61..24f880cfa5d6 100644
--- a/Makefile
+++ b/Makefile
@@ -85,12 +85,17 @@ endif
 
 quiet = quiet_
 Q = @
+dryrun =
 
 ifneq ($(findstring 1, $(KBUILD_VERBOSE)),)
   quiet =
   Q =
 endif
 
+ifneq ($(findstring 3, $(KBUILD_VERBOSE)),)
+  dryrun = 1
+endif
+
 # If the user is running make -s (silent mode), suppress echoing of
 # commands
 ifneq ($(findstring s,$(firstword -$(MAKEFLAGS))),)
@@ -98,7 +103,7 @@ quiet=silent_
 override KBUILD_VERBOSE :=
 endif
 
-export quiet Q KBUILD_VERBOSE
+export quiet Q dryrun KBUILD_VERBOSE
 
 # Call a source code checker (by default, "sparse") as part of the
 # C compilation.
@@ -1202,6 +1207,7 @@ KBUILD_MODULES := y
 endif
 
 # '$(AR) mPi' needs 'T' to workaround the bug of llvm-ar <= 14
+dryrun_cmd_ar_vmlinux.a = $(cmd_ar_vmlinux.a)
 quiet_cmd_ar_vmlinux.a = AR      $@
       cmd_ar_vmlinux.a = \
 	rm -f $@; \
@@ -2063,6 +2069,7 @@ nsdeps: modules
 # Clang Tooling
 # ---------------------------------------------------------------------------
 
+dryrun_cmd_gen_compile_commands = $(cmd_gen_compile_commands)
 quiet_cmd_gen_compile_commands = GEN     $@
       cmd_gen_compile_commands = $(PYTHON3) $< -a $(AR) -o $@ $(filter-out $<, $(real-prereqs))
 
@@ -2070,6 +2077,12 @@ compile_commands.json: $(srctree)/scripts/clang-tools/gen_compile_commands.py \
 	$(if $(KBUILD_EXTMOD),, vmlinux.a $(KBUILD_VMLINUX_LIBS)) \
 	$(if $(CONFIG_MODULES), modules.order) FORCE
 	$(call if_changed,gen_compile_commands)
+ifdef dryrun
+	@echo "============ NOTICE NOTICE NOTICE ============="
+	@echo "The dry-run mode (V=3) corrupts the build tree."
+	@echo "Please run 'make clean' when you are done."
+	@echo "==============================================="
+endif
 
 targets += compile_commands.json
 
diff --git a/kernel/Makefile b/kernel/Makefile
index 32e80dd626af..34a7be3895c9 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -160,6 +160,7 @@ $(obj)/config_data: $(KCONFIG_CONFIG) FORCE
 
 $(obj)/kheaders.o: $(obj)/kheaders_data.tar.xz
 
+dryrun_cmd_genikh = test -f $@ || touch $@
 quiet_cmd_genikh = CHK     $(obj)/kheaders_data.tar.xz
       cmd_genikh = $(CONFIG_SHELL) $(srctree)/kernel/gen_kheaders.sh $@
 $(obj)/kheaders_data.tar.xz: FORCE
diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index 8c311b997e24..c384fc89bbab 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -123,9 +123,14 @@ clean := -f $(srctree)/scripts/Makefile.clean obj
 # If quiet is "silent_", print nothing and sink stdout
 # If quiet is "quiet_", print short log
 # If quiet is empty, print short log and whole command
+
+# When the dry-run mode is enabled and we are just doing a no-op
+# (just creating an empty target file), ':' is annotated.
+quiet_dryrun_tag = $(if $(dryrun),$(if $(dryrun_cmd_$1), ,:), )
+
 silent_log_print = exec >/dev/null;
- quiet_log_print = $(if $(quiet_cmd_$1), echo '  $(call escsq,$(quiet_cmd_$1)$(why))';)
-       log_print = echo '$(pound) $(call escsq,$(or $(quiet_cmd_$1),cmd_$1 $@)$(why))'; \
+ quiet_log_print = $(if $(quiet_cmd_$1), echo ' $(quiet_dryrun_tag)$(call escsq,$(quiet_cmd_$1)$(why))';)
+       log_print = echo '$(pound)$(quiet_dryrun_tag)$(call escsq,$(quiet_dryrun_tag)$(or $(quiet_cmd_$1),cmd_$1 $@)$(why))'; \
                    echo '  $(call escsq,$(cmd_$1))';
 
 # Delete the target on interruption
@@ -149,8 +154,10 @@ delete-on-interrupt = \
 		$(foreach sig, HUP INT QUIT TERM PIPE, \
 			trap 'rm -f $@; trap - $(sig); kill -s $(sig) $$$$' $(sig);))
 
+maybe-dryrun-cmd = $(if $(dryrun),$(or $(dryrun_cmd_$(1)),mkdir -p $(@D); : > $@),$(cmd_$(1)))
+
 # print and execute commands
-cmd = @$(if $(cmd_$(1)),set -e; $($(quiet)log_print) $(delete-on-interrupt) $(cmd_$(1)),:)
+cmd = @$(if $(cmd_$(1)),set -e; $($(quiet)log_print) $(delete-on-interrupt) $(maybe-dryrun-cmd),:)
 
 ###
 # if_changed      - execute command if any prerequisite is newer than
@@ -208,6 +215,10 @@ cmd_and_fixdep =                                                             \
 	$(objtree)/scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).cmd;\
 	rm -f $(depfile)
 
+ifeq ($(dryrun),1)
+cmd_and_fixdep = $(cmd_and_savecmd)
+endif
+
 # Usage: $(call if_changed_rule,foo)
 # Will check if $(cmd_foo) or any of the prerequisites changed,
 # and if so will execute $(rule_foo).
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index a6461ea411f7..cca01530a89a 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -289,6 +289,7 @@ $(obj)/%.o: $(obj)/%.c $(recordmcount_source) FORCE
 
 # To make this rule robust against "Argument list too long" error,
 # ensure to add $(obj)/ prefix by a shell command.
+dryrun_cmd_mod = $(cmd_mod)
 cmd_mod = printf '%s\n' $(call real-search, $*.o, .o, -objs -y -m) | \
 	$(AWK) '!x[$$0]++ { print("$(obj)/"$$0) }' > $@
 
@@ -462,6 +463,7 @@ $(subdir-modorder): $(obj)/%/modules.order: $(obj)/% ;
 # To make this rule robust against "Argument list too long" error,
 # remove $(obj)/ prefix, and restore it by a shell command.
 
+dryrun_cmd_ar_builtin = $(cmd_ar_builtin)
 quiet_cmd_ar_builtin = AR      $@
       cmd_ar_builtin = rm -f $@; \
 	$(if $(real-prereqs), printf "$(obj)/%s " $(patsubst $(obj)/%,%,$(real-prereqs)) | xargs) \
@@ -473,6 +475,7 @@ $(obj)/built-in.a: $(real-obj-y) FORCE
 # This is a list of build artifacts from the current Makefile and its
 # sub-directories. The timestamp should be updated when any of the member files.
 
+dryrun_cmd_gen_order = $(cmd_gen_order)
 cmd_gen_order = { $(foreach m, $(real-prereqs), \
 	$(if $(filter %/$(notdir $@), $m), cat $m, echo $m);) :; } \
 	> $@
diff --git a/scripts/Makefile.modpost b/scripts/Makefile.modpost
index d7d45067d08b..dce60bf473ed 100644
--- a/scripts/Makefile.modpost
+++ b/scripts/Makefile.modpost
@@ -132,8 +132,9 @@ modpost-args += -e $(addprefix -i , $(KBUILD_EXTRA_SYMBOLS))
 
 endif # ($(KBUILD_EXTMOD),)
 
+dryrun_cmd_modpost = touch $@ .vmlinux.export.c; sed 's/o$$/mod.c/' modules.order | xargs -r touch
 quiet_cmd_modpost = MODPOST $@
-      cmd_modpost = \
+       cmd_modpost = \
 	$(if $(missing-input), \
 		echo >&2 "WARNING: $(missing-input) is missing."; \
 		echo >&2 "         Modules may not have dependencies or modversions."; \
diff --git a/scripts/Makefile.vmlinux b/scripts/Makefile.vmlinux
index b64862dc6f08..7c27f80597b5 100644
--- a/scripts/Makefile.vmlinux
+++ b/scripts/Makefile.vmlinux
@@ -82,6 +82,7 @@ endif
 ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(SRCARCH)/Makefile.postlink)
 
 # Final link of vmlinux with optional arch pass after final link
+dryrun_cmd_link_vmlinux = touch $@ vmlinux.map
 cmd_link_vmlinux =							\
 	$< "$(LD)" "$(KBUILD_LDFLAGS)" "$(LDFLAGS_vmlinux)" "$@";	\
 	$(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true)
diff --git a/scripts/Makefile.vmlinux_o b/scripts/Makefile.vmlinux_o
index b024ffb3e201..dcf6a8c06727 100644
--- a/scripts/Makefile.vmlinux_o
+++ b/scripts/Makefile.vmlinux_o
@@ -54,6 +54,7 @@ objtool-args = $(vmlinux-objtool-args-y) --link
 
 vmlinux-o-ld-args-$(CONFIG_BUILTIN_MODULE_RANGES)	+= -Map=$@.map
 
+dryrun_cmd_ld_vmlinux.o = touch $@ $@.map
 quiet_cmd_ld_vmlinux.o = LD      $@
       cmd_ld_vmlinux.o = \
 	$(LD) ${KBUILD_LDFLAGS} -r -o $@ \
-- 
2.43.0

Re: Generating .cmd files without actually building the kernel?

[Anish Moorthy]

On Mon, Jun 9, 2025 at 3:17 AM Masahiro Yamada <masahiroy@kernel.org> wrote:
>
> On Sat, Jun 7, 2025 at 1:06 AM Anish Moorthy <amoorthy@google.com> wrote:
> >
> > Does anyone know/have ideas on how to do this? I'd like to be able to
> > generate compile_commands.json and browse the kernel code without
> > having to build the whole thing.
>
>
> What a coincidence, I was also thinking about this.
>
> Unlike ninja-build, Makefiles in Kbuild are not structured flat.
>
> So, supporting dry-run mode needs several amendments everywhere,
> (and it is not easily maintainable)
> If interested, RFC exists. [1]
>
> Of course, the complete dry-run is not desired here,
> since we need to generate .*.cmd files at least.
>
>
> I just proto-typed this and attached a patch.
> The implementation is hacky, and I am not sure
> if this should land in the main line.
>
> Please let me know whether the attached patch works for you.
>

Thanks a bunch! First off, sorry for the late response: happened to be
out last week.

The patch appears to work, although it does appear to miss a
relatively small portion of the tree (arch/lib and arch/x86/lib for my
config)

```
$ git checkout v6.15 && make clean && make mrproper
$ make defconfig          # Obv can vary, lmk if you actually want to
repro with my config
$ make compile_commands.json && cp compile_commands.json /tmp/orig

# Apply patch
$ make clean && make mrproper && make defconfig
$ make V=3 compile_commands.json

$ git diff /tmp/orig compile_commands.json
https://pastebin.com/tvE9wSVG
```

I will say that I often want to browse the kernel on machines which
have little to no hope of compiling it (my laptop, a raspberry pi) and
would find something like this very useful- even if it's shunted off
to some new dryrun_compile_commands_clean_tree target. But this patch
does look a bit burdensome to maintain, and obviously it's your call
to make. Do let me know if I can somehow help this functionality along
though.

Thanks again!

>
> [1]: https://lore.kernel.org/linux-kbuild/20240819160309.2218114-1-vegard.nossum@oracle.com/
>
>
>
>
> >
> > It seems to me that the basic change/hack should be something like
> > [1]. But of course, it's not that simply just applying that patch and
> > then running "make defconfig; make" runs into an error pretty quickly
> >
> > > $ make defconfig
> > > $ make
> > > ...
> > > ./scripts/basic/fixdep scripts/mod/.empty.o.d scripts/mod/empty.o '${GCC_COMMAND_HERE}' > scripts/mod/.empty.o.cmd; rm -f scripts/mod/.empty.o.d
> > >fixdep: error opening file: scripts/mod/.empty.o.d: No such file or directory
> >   HOSTCC  scripts/mod/mk_elfconfig
> >   MKELF   scripts/mod/elfconfig.h
> > > /bin/sh: line 1: scripts/mod/empty.o: No such file or directory
> > > make[2]: *** [scripts/mod/Makefile:25: scripts/mod/elfconfig.h] Error 1
> > > make[1]: *** [/usr/local/google/home/amoorthy/linux/Makefile:1271: prepare0] Error 2
> > > make: *** [Makefile:251: __sub-make] Error 2
> >
> > I take it the gcc command itself is generating the .d files, which I
> > guess makes sense given the existence of gcc's -MF flag (though grep's
> > not good enough for me to figure out where we're setting thins). I
> > tried
> >
> > > $ make CFLAGS="-E"
> >
> > too under the theory that this would generate the .o.d files, but this
> > just dies elsewhere
> >
> > >  exec-cmd.c:2:10: fatal error: linux/compiler.h: No such file or directory
> >     2 | #include <linux/compiler.h>
> >       |          ^~~~~~~~~~~~~~~~~~
> > > compilation terminated.
> >
> > Anyways, I've spent a fair chunk of time trying to understand the
> > system at this point, but I'm really still just fumbling around:
> > figured I'd try asking for help.
> >
> >
> >
> > [1]
> > diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
> > index 8c311b997e24..a17cdfa7ab72 100644
> > --- a/scripts/Kbuild.include
> > +++ b/scripts/Kbuild.include
> > @@ -208,6 +208,10 @@ cmd_and_fixdep =
> >                            \
> >         $(objtree)/scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' >
> > $(dot-target).cmd;\
> >         rm -f $(depfile)
> >
> > +savecmd_and_fixdep =
> >            \
> > +       $(objtree)/scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' >
> > $(dot-target).cmd;\
> > +       rm -f $(depfile)
> > +
> >  # Usage: $(call if_changed_rule,foo)
> >  # Will check if $(cmd_foo) or any of the prerequisites changed,
> >  # and if so will execute $(rule_foo).
> > diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
> > index 4d543054f723..9fcb41f96d89 100644
> > --- a/scripts/Makefile.lib
> > +++ b/scripts/Makefile.lib
> > @@ -318,7 +318,7 @@ quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
> >                 $(cmd_objtool)
> >
> >  define rule_cc_o_c
> > -       $(call cmd_and_fixdep,cc_o_c)
> > +       $(call savecmd_and_fixdep,cc_o_c)
> >         $(call cmd,checksrc)
> >         $(call cmd,checkdoc)
> >         $(call cmd,gen_objtooldep)
> >
>
>
> --
> Best Regards
> Masahiro Yamada