Re: [PATCH v4 0/2] Implement endianess swap macros for RISC-V

[Alexandre Ghiti <alex@ghiti.fr>]

Hi Arnd,

Gentle ping as we would like to merge this in the riscv tree but we need 
your ack (or nack).

Thanks,

Alex

On 5/16/25 16:37, Alexandre Ghiti wrote:
> Hi Arnd,
>
> Do you think we can merge that for 6.16? It is nice improvement for us.
>
> Thanks,
>
> Alex
>
> On 26/04/2025 16:56, Ignacio Encinas wrote:
>> Motivated by [1]. A couple of things to note:
>>
>> RISC-V needs a default implementation to fall back on. There is one
>> available in include/uapi/linux/swab.h but that header can't be included
>> from arch/riscv/include/asm/swab.h. Therefore, the first patch in this
>> series moves the default implementation into asm-generic.
>>
>> Tested with crc_kunit as pointed out here [2]. I can't provide
>> performance numbers as I don't have RISC-V hardware yet.
>>
>> [1] https://lore.kernel.org/all/20250302220426.GC2079@quark.localdomain/
>> [2] 
>> https://lore.kernel.org/all/20250216225530.306980-1-ebiggers@kernel.org/
>>
>> Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
>> ---
>> Changes in v4:
>>
>> - Add missing include in the 1st patch, reported by
>> https://lore.kernel.org/all/202504042300.it9RcOSt-lkp@intel.com/
>> - Rewrite the ARCH_SWAB macro as suggested by Arnd
>> - Define __arch_swab64 for CONFIG_32BIT (Ben)
>> - Link to v3: 
>> https://lore.kernel.org/r/20250403-riscv-swab-v3-0-3bf705d80e33@iencinas.com
>>
>> Arnd, I know you don't like Patch 1 but I tried your suggestions and
>> couldn't make them work. Please let me know if I missed anything [3] [4]
>>
>> [3] 
>> https://lore.kernel.org/linux-riscv/f5464e26-faa0-48f1-8585-9ce52c8c9f5f@iencinas.com/
>> [4] 
>> https://lore.kernel.org/linux-riscv/b3b59747-0484-4042-bdc4-c067688e3bfe@iencinas.com/
>>
>> Changes in v3:
>>
>> PATCH 2:
>>    Use if(riscv_has_extension_likely) instead of asm goto (Eric). It
>>    looks like both versions generate the same assembly. Perhaps we 
>> should
>>    do the same change in other places such as 
>> arch/riscv/include/asm/bitops.h
>> - Link to v2: 
>> https://lore.kernel.org/r/20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com
>>
>> Changes in v2:
>> - Introduce first patch factoring out the default implementation into
>>    asm-generic
>> - Remove blank line to make checkpatch happy
>> - Link to v1: 
>> https://lore.kernel.org/r/20250310-riscv-swab-v1-1-34652ef1ee96@iencinas.com
>>
>> ---
>> Ignacio Encinas (2):
>>        include/uapi/linux/swab.h: move default implementation for 
>> swab macros into asm-generic
>>        riscv: introduce asm/swab.h
>>
>>   arch/riscv/include/asm/swab.h   | 62 
>> +++++++++++++++++++++++++++++++++++++++++
>>   include/uapi/asm-generic/swab.h | 33 ++++++++++++++++++++++
>>   include/uapi/linux/swab.h       | 33 +---------------------
>>   3 files changed, 96 insertions(+), 32 deletions(-)
>> ---
>> base-commit: a7f2e10ecd8f18b83951b0bab47ddaf48f93bf47
>> change-id: 20250307-riscv-swab-b81b94a9ac1b
>>
>> Best regards,