From: Reinette Chatre <reinette.chatre@intel.com>
To: Xiaochen Shen <shenxiaochen@open-hieco.net>,
<tony.luck@intel.com>, <bp@alien8.de>, <fenghuay@nvidia.com>,
<shuah@kernel.org>, <skhan@linuxfoundation.org>
Cc: <babu.moger@amd.com>, <james.morse@arm.com>,
<Dave.Martin@arm.com>, <x86@kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-kselftest@vger.kernel.org>
Subject: Re: [PATCH v3 1/4] selftests/resctrl: Define CPU vendor IDs as bits to match usage
Date: Thu, 11 Dec 2025 21:22:55 -0800 [thread overview]
Message-ID: <075748c3-a82b-4e7e-b7e9-6f8900ba2020@intel.com> (raw)
In-Reply-To: <20251211064632.2344393-2-shenxiaochen@open-hieco.net>
Hi Xiaochen,
On 12/10/25 10:46 PM, Xiaochen Shen wrote:
> The CPU vendor IDs are required to be unique bits because they're used
> for vendor_specific bitmask in the struct resctrl_test.
> Consider for example their usage in test_vendor_specific_check():
> return get_vendor() & test->vendor_specific
>
> However, the definitions of CPU vendor IDs in file resctrl.h is quite
> subtle as a bitmask value:
> #define ARCH_INTEL 1
> #define ARCH_AMD 2
>
> A clearer and more maintainable approach is to define these CPU vendor
> IDs using BIT(). This ensures each vendor corresponds to a distinct bit
> and makes it obvious when adding new vendor IDs.
>
> Accordingly, update the return types of detect_vendor() and get_vendor()
> from 'int' to 'unsigned int' to align with their usage as bitmask values
> and to prevent potentially risky type conversions.
>
> Furthermore, introduce a bool flag 'initialized' to simplify the
> get_vendor() -> detect_vendor() logic. This ensures the vendor ID is
> detected only once and resolves the ambiguity of using the same variable
> 'vendor' both as a value and as a state.
>
> Suggested-by: Reinette Chatre <reinette.chatre@intel.com>
> Suggested-by: Fenghua Yu <fenghuay@nvidia.com>
> Signed-off-by: Xiaochen Shen <shenxiaochen@open-hieco.net>
> ---
> tools/testing/selftests/resctrl/resctrl.h | 7 ++---
> .../testing/selftests/resctrl/resctrl_tests.c | 26 +++++++++++++------
> 2 files changed, 22 insertions(+), 11 deletions(-)
>
> diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h
> index cd3adfc14969..d0f094360e6f 100644
> --- a/tools/testing/selftests/resctrl/resctrl.h
> +++ b/tools/testing/selftests/resctrl/resctrl.h
> @@ -23,6 +23,7 @@
> #include <asm/unistd.h>
> #include <linux/perf_event.h>
> #include <linux/compiler.h>
> +#include <linux/bits.h>
> #include "../kselftest.h"
>
> #define MB (1024 * 1024)
I tried this series against latest upstream kernel and found a conflict with some recent kselftest
refactoring via commit e6fbd1759c9e ("selftests: complete kselftest include centralization").
Usually the strategy for resctrl tests is to base them on "next" branch of
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest.git ... but I notice that the
conflicting change was routed differently and thus difficult to have anticipated.
Since we are in merge window the maintainer repos are not ready for new features yet.
Until the repo is ready, could you please base on latest upstream?
Looking at the series it is not obvious how you want these patches handled though. Patch #3
is the only one with a "Fixes:" tag (and thus candidate for automatic backport) but it is in
the middle of the series. It is usually best to have fixes at beginning of series to
simplify their handling. Even so, all patches are fixes but only patch #4 has a note
not to consider for backport. Could you please consider how you want these patches handled,
communicate that clearly in cover letter, and re-organize the series to have the ones needing
backport to be at beginning of series?
> @@ -36,8 +37,8 @@
> * Define as bits because they're used for vendor_specific bitmask in
> * the struct resctrl_test.
> */
> -#define ARCH_INTEL 1
> -#define ARCH_AMD 2
> +#define ARCH_INTEL BIT(0)
> +#define ARCH_AMD BIT(1)
>
> #define END_OF_TESTS 1
>
> @@ -163,7 +164,7 @@ extern int snc_unreliable;
> extern char llc_occup_path[1024];
>
> int snc_nodes_per_l3_cache(void);
> -int get_vendor(void);
> +unsigned int get_vendor(void);
> bool check_resctrlfs_support(void);
> int filter_dmesg(void);
> int get_domain_id(const char *resource, int cpu_no, int *domain_id);
> diff --git a/tools/testing/selftests/resctrl/resctrl_tests.c b/tools/testing/selftests/resctrl/resctrl_tests.c
> index 5154ffd821c4..08cbd094e936 100644
> --- a/tools/testing/selftests/resctrl/resctrl_tests.c
> +++ b/tools/testing/selftests/resctrl/resctrl_tests.c
> @@ -23,16 +23,24 @@ static struct resctrl_test *resctrl_tests[] = {
> &l2_noncont_cat_test,
> };
>
> -static int detect_vendor(void)
> +static unsigned int detect_vendor(void)
> {
> - FILE *inf = fopen("/proc/cpuinfo", "r");
> - int vendor_id = 0;
> + static bool initialized;
> + static unsigned int vendor_id;
> + FILE *inf;
Please maintain the reverse fir ordering.
> char *s = NULL;
> char *res;
>
> - if (!inf)
> + if (initialized)
> return vendor_id;
>
> + inf = fopen("/proc/cpuinfo", "r");
> + if (!inf) {
> + vendor_id = 0;
> + initialized = true;
> + return vendor_id;
> + }
> +
> res = fgrep(inf, "vendor_id");
>
> if (res)
> @@ -45,15 +53,17 @@ static int detect_vendor(void)
>
> fclose(inf);
> free(res);
> +
> + initialized = true;
> return vendor_id;
> }
>
> -int get_vendor(void)
> +unsigned int get_vendor(void)
> {
> - static int vendor = -1;
> + unsigned int vendor;
> +
> + vendor = detect_vendor();
>
> - if (vendor == -1)
> - vendor = detect_vendor();
> if (vendor == 0)
> ksft_print_msg("Can not get vendor info...\n");
>
Patch looks good to me.
Thank you
Reinette
next prev parent reply other threads:[~2025-12-12 5:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-11 6:46 [PATCH v3 0/4] selftests/resctrl: Add Hygon CPUs support and bug fixes Xiaochen Shen
2025-12-11 6:46 ` [PATCH v3 1/4] selftests/resctrl: Define CPU vendor IDs as bits to match usage Xiaochen Shen
2025-12-12 5:22 ` Reinette Chatre [this message]
2025-12-12 7:32 ` Xiaochen Shen
2025-12-12 19:04 ` Reinette Chatre
2025-12-11 6:46 ` [PATCH v3 2/4] selftests/resctrl: Add CPU vendor detection for Hygon Xiaochen Shen
2025-12-12 5:23 ` Reinette Chatre
2025-12-12 7:38 ` Xiaochen Shen
2025-12-11 6:46 ` [PATCH v3 3/4] selftests/resctrl: Fix a division by zero error on Hygon Xiaochen Shen
2025-12-11 6:46 ` [PATCH v3 4/4] selftests/resctrl: Fix non-contiguous CBM check for Hygon Xiaochen Shen
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