From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 585732798E6; Thu, 27 Nov 2025 13:31:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764250261; cv=none; b=sU4K7J5y96Esc+9cibuMIdIO0Eq1NrxoqGbWWCKm7FGNKodUB55jSYqBtfHcgKm28Obp2mtk2tu8J/cpb5YgdMP9gbqi1vPzB8+ULwMS4SZ0EqPvrOZol8Dk+FcaAoSbnnPspJkCP0kGEgvSFIbxyrttJSh/9KoCH3PFd64xb9c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764250261; c=relaxed/simple; bh=Nxi6QamY+tXHbFTsJOvxm6MY4XMwJfJxT+uvqO4GGg8=; h=Message-ID:Date:MIME-Version:Subject:To:References:From: In-Reply-To:Content-Type; b=ncMN79267l3bZ4paI+bkXPR4s3gloTN1N2iFbWwQjANDGy5GKBKPYdhDFN1BSf8/bRLVQkUxJM9b5b2i5zKMT2pj/cm53TreN5Ykb01P3fKtulbqYD/iIe20uQ1vYaS3dY48l/vYOtkJLr0crGAXfXAsIiNnKb0AbsvoWB7OzxA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7F6CC1762; Thu, 27 Nov 2025 05:30:52 -0800 (PST) Received: from [10.57.43.59] (unknown [10.57.43.59]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4786B3F66E; Thu, 27 Nov 2025 05:30:54 -0800 (PST) Message-ID: <1fecc357-2d7d-4016-b70f-5789ff4a8262@arm.com> Date: Thu, 27 Nov 2025 14:30:51 +0100 Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 10/12] entry: Add arch_ptrace_report_syscall_entry/exit() To: Jinjie Ruan , catalin.marinas@arm.com, will@kernel.org, oleg@redhat.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, shuah@kernel.org, kees@kernel.org, wad@chromium.org, charlie@rivosinc.com, akpm@linux-foundation.org, ldv@strace.io, macro@orcam.me.uk, deller@gmx.de, mark.rutland@arm.com, efault@gmx.de, song@kernel.org, mbenes@suse.cz, ryan.roberts@arm.com, ada.coupriediaz@arm.com, anshuman.khandual@arm.com, broonie@kernel.org, pengcan@kylinos.cn, dvyukov@google.com, kmal@cock.li, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org References: <20251126071446.3234218-1-ruanjinjie@huawei.com> <20251126071446.3234218-11-ruanjinjie@huawei.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <20251126071446.3234218-11-ruanjinjie@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26/11/2025 08:14, Jinjie Ruan wrote: > Differ from generic entry, due to historical reasons, ARM64 need to > save/restore during syscall entry/exit because ARM64 use a scratch > register (ip(r12) on AArch32, x7 on AArch64) to denote syscall entry/exit. > > In preparation for moving arm64 over to the generic entry code, > add arch_ptrace_report_syscall_entry/exit() as the default > ptrace_report_syscall_entry/exit() implementation. This allows > arm64 to implement the architecture specific version. > > This allows arm64 to implement the architecture specific version. > > Suggested-by: Mark Rutland > Suggested-by: Thomas Gleixner > Signed-off-by: Jinjie Ruan Reviewed-by: Kevin Brodsky