From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Oleg Nesterov <oleg@redhat.com>,
Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Shuah Khan <shuah@kernel.org>
Cc: Alan Hayward <alan.hayward@arm.com>,
Luis Machado <luis.machado@arm.com>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
linux-kselftest@vger.kernel.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v4 09/21] arm64/sme: Provide storage for ZT0
Date: Mon, 16 Jan 2023 16:04:44 +0000 [thread overview]
Message-ID: <20221208-arm64-sme2-v4-9-f2fa0aef982f@kernel.org> (raw)
In-Reply-To: <20221208-arm64-sme2-v4-0-f2fa0aef982f@kernel.org>
When the system supports SME2 there is an additional register ZT0 which
we must store when the task is using SME. Since ZT0 is accessible only
when PSTATE.ZA is set just like ZA we allocate storage for it along with
ZA, increasing the allocation size for the memory region where we store
ZA and storing the data for ZT after that for ZA.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/fpsimd.h | 13 +++++++++++++
arch/arm64/kernel/process.c | 10 +++++-----
2 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index 2a66e3b94553..8df769c20677 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -105,6 +105,13 @@ static inline void *sve_pffr(struct thread_struct *thread)
return (char *)thread->sve_state + sve_ffr_offset(vl);
}
+static inline void *thread_zt_state(struct thread_struct *thread)
+{
+ /* The ZT register state is stored immediately after the ZA state */
+ unsigned int sme_vq = sve_vq_from_vl(thread_get_sme_vl(thread));
+ return thread->sme_state + ZA_SIG_REGS_SIZE(sme_vq);
+}
+
extern void sve_save_state(void *state, u32 *pfpsr, int save_ffr);
extern void sve_load_state(void const *state, u32 const *pfpsr,
int restore_ffr);
@@ -354,6 +361,9 @@ extern unsigned int sme_get_vl(void);
extern int sme_set_current_vl(unsigned long arg);
extern int sme_get_current_vl(void);
+/* Will move with signal support */
+#define ZT_SIG_REG_SIZE 512
+
/*
* Return how many bytes of memory are required to store the full SME
* specific state for task, given task's currently configured vector
@@ -366,6 +376,9 @@ static inline size_t sme_state_size(struct task_struct const *task)
size = ZA_SIG_REGS_SIZE(sve_vq_from_vl(vl));
+ if (system_supports_sme2())
+ size += ZT_SIG_REG_SIZE;
+
return size;
}
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 4ce0c4313ec6..71d59b5abede 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -307,11 +307,11 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
/*
* In the unlikely event that we create a new thread with ZA
- * enabled we should retain the ZA state so duplicate it here.
- * This may be shortly freed if we exec() or if CLONE_SETTLS
- * but it's simpler to do it here. To avoid confusing the rest
- * of the code ensure that we have a sve_state allocated
- * whenever sme_state is allocated.
+ * enabled we should retain the ZA and ZT state so duplicate
+ * it here. This may be shortly freed if we exec() or if
+ * CLONE_SETTLS but it's simpler to do it here. To avoid
+ * confusing the rest of the code ensure that we have a
+ * sve_state allocated whenever sme_state is allocated.
*/
if (thread_za_enabled(&src->thread)) {
dst->thread.sve_state = kzalloc(sve_state_size(src),
--
2.34.1
next prev parent reply other threads:[~2023-01-16 16:10 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-16 16:04 [PATCH v4 00/21] arm64/sme: Support SME 2 and SME 2.1 Mark Brown
2023-01-16 16:04 ` [PATCH v4 01/21] arm64/sme: Rename za_state to sme_state Mark Brown
2023-01-16 16:04 ` [PATCH v4 02/21] arm64: Document boot requirements for SME 2 Mark Brown
2023-01-16 16:04 ` [PATCH v4 03/21] arm64/sysreg: Update system registers for SME 2 and 2.1 Mark Brown
2023-01-16 16:04 ` [PATCH v4 04/21] arm64/sme: Document SME 2 and SME 2.1 ABI Mark Brown
2023-01-16 16:04 ` [PATCH v4 05/21] arm64/esr: Document ISS for ZT0 being disabled Mark Brown
2023-01-16 16:04 ` [PATCH v4 06/21] arm64/sme: Manually encode ZT0 load and store instructions Mark Brown
2023-01-16 16:04 ` [PATCH v4 07/21] arm64/sme: Enable host kernel to access ZT0 Mark Brown
2023-02-06 9:31 ` Marc Zyngier
2023-02-06 13:02 ` Mark Brown
2023-02-06 16:44 ` Catalin Marinas
2023-01-16 16:04 ` [PATCH v4 08/21] arm64/sme: Add basic enumeration for SME2 Mark Brown
2023-01-16 16:04 ` Mark Brown [this message]
2023-01-16 16:04 ` [PATCH v4 10/21] arm64/sme: Implement context switching for ZT0 Mark Brown
2023-01-16 16:04 ` [PATCH v4 11/21] arm64/sme: Implement signal handling for ZT Mark Brown
2023-01-16 16:04 ` [PATCH v4 12/21] arm64/sme: Implement ZT0 ptrace support Mark Brown
2023-01-16 16:04 ` [PATCH v4 13/21] arm64/sme: Add hwcaps for SME 2 and 2.1 features Mark Brown
2023-01-16 16:04 ` [PATCH v4 14/21] kselftest/arm64: Add a stress test program for ZT0 Mark Brown
2023-01-16 16:04 ` [PATCH v4 15/21] kselftest/arm64: Cover ZT in the FP stress test Mark Brown
2023-01-16 16:04 ` [PATCH v4 16/21] kselftest/arm64: Enumerate SME2 in the signal test utility code Mark Brown
2023-01-16 16:04 ` [PATCH v4 17/21] kselftest/arm64: Teach the generic signal context validation about ZT Mark Brown
2023-01-16 16:04 ` [PATCH v4 18/21] kselftest/arm64: Add test coverage for ZT register signal frames Mark Brown
2023-01-16 16:04 ` [PATCH v4 19/21] kselftest/arm64: Add SME2 coverage to syscall-abi Mark Brown
2023-01-16 16:04 ` [PATCH v4 20/21] kselftest/arm64: Add coverage of the ZT ptrace regset Mark Brown
2023-01-16 16:04 ` [PATCH v4 21/21] kselftest/arm64: Add coverage of SME 2 and 2.1 hwcaps Mark Brown
2023-01-20 16:59 ` [PATCH v4 00/21] arm64/sme: Support SME 2 and SME 2.1 Catalin Marinas
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