Re: [PATCH v2 0/9] KVM RISC-V Conditional Operations

Conor Dooley
2023-09-25T15:33:27Z

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On Mon, Sep 25, 2023 at 07:08:50PM +0530, Anup Patel wrote:
> This series extends KVM RISC-V to allow Guest/VM discover and use
> conditional operations related ISA extensions (namely XVentanaCondOps
> and Zicond).
>
> To try these patches, use KVMTOOL from riscv_zbx_zicntr_smstateen_condops_v1
> branch at: https://github.com/avpatel/kvmtool.git
>
> These patches are based upon the latest riscv_kvm_queue and can also be
> found in the riscv_kvm_condops_v2 branch at:
> https://github.com/avpatel/linux.git
>
> Changes since v1:
> - Rebased the series on riscv_kvm_queue
> - Split PATCH1 and PATCH2 of v1 series into two patches
> - Added separate test configs for XVentanaCondOps and Zicond in PATCH7
> of v1 series.
>
> Anup Patel (9):
> dt-bindings: riscv: Add XVentanaCondOps extension entry
> RISC-V: Detect XVentanaCondOps from ISA string
> dt-bindings: riscv: Add Zicond extension entry
> RISC-V: Detect Zicond from ISA string

For these 4:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks for splitting it out,
Conor.

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