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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id ty6-20020a170907c70600b00a3f27031d7bsm1845582ejc.104.2024.02.28.05.10.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 05:10:03 -0800 (PST) Date: Wed, 28 Feb 2024 14:10:02 +0100 From: Andrew Jones To: Anup Patel Cc: Paolo Bonzini , Atish Patra , Shuah Khan , Palmer Dabbelt , Paul Walmsley , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH 4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM Message-ID: <20240228-0e0165118517dc2a94e60941@orel> References: <20240214123757.305347-1-apatel@ventanamicro.com> <20240214123757.305347-5-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240214123757.305347-5-apatel@ventanamicro.com> On Wed, Feb 14, 2024 at 06:07:56PM +0530, Anup Patel wrote: > We extend the KVM ISA extension ONE_REG interface to allow KVM > user space to detect and enable Zacas extension for Guest/VM. > > Signed-off-by: Anup Patel > --- > arch/riscv/include/uapi/asm/kvm.h | 1 + > arch/riscv/kvm/vcpu_onereg.c | 2 ++ > 2 files changed, 3 insertions(+) > > diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h > index f8aa9f2ace95..37fb0f70b3e5 100644 > --- a/arch/riscv/include/uapi/asm/kvm.h > +++ b/arch/riscv/include/uapi/asm/kvm.h > @@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID { > KVM_RISCV_ISA_EXT_ZVFHMIN, > KVM_RISCV_ISA_EXT_ZFA, > KVM_RISCV_ISA_EXT_ZTSO, > + KVM_RISCV_ISA_EXT_ZACAS, > KVM_RISCV_ISA_EXT_MAX, > }; > > diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c > index 38f5cf286087..f4a6124d25c9 100644 > --- a/arch/riscv/kvm/vcpu_onereg.c > +++ b/arch/riscv/kvm/vcpu_onereg.c > @@ -40,6 +40,7 @@ static const unsigned long kvm_isa_ext_arr[] = { > KVM_ISA_EXT_ARR(SVINVAL), > KVM_ISA_EXT_ARR(SVNAPOT), > KVM_ISA_EXT_ARR(SVPBMT), > + KVM_ISA_EXT_ARR(ZACAS), > KVM_ISA_EXT_ARR(ZBA), > KVM_ISA_EXT_ARR(ZBB), > KVM_ISA_EXT_ARR(ZBC), > @@ -118,6 +119,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) > case KVM_RISCV_ISA_EXT_SSTC: > case KVM_RISCV_ISA_EXT_SVINVAL: > case KVM_RISCV_ISA_EXT_SVNAPOT: > + case KVM_RISCV_ISA_EXT_ZACAS: > case KVM_RISCV_ISA_EXT_ZBA: > case KVM_RISCV_ISA_EXT_ZBB: > case KVM_RISCV_ISA_EXT_ZBC: > -- > 2.34.1 > Reviewed-by: Andrew Jones