From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Shuah Khan <shuah@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org,
linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>,
Thiago Jung Bauermann <thiago.bauermann@linaro.org>
Subject: [PATCH v16 6/6] KVM: selftests: arm64: Add GCS registers to get-reg-list
Date: Fri, 12 Sep 2025 10:25:32 +0100 [thread overview]
Message-ID: <20250912-arm64-gcs-v16-6-6435e5ec37db@kernel.org> (raw)
In-Reply-To: <20250912-arm64-gcs-v16-0-6435e5ec37db@kernel.org>
GCS adds new registers GCSCR_EL1, GCSCRE0_EL1, GCSPR_EL1 and GCSPR_EL0. Add
these to those validated by get-reg-list.
Reviewed-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
tools/testing/selftests/kvm/arm64/get-reg-list.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/tools/testing/selftests/kvm/arm64/get-reg-list.c b/tools/testing/selftests/kvm/arm64/get-reg-list.c
index 011fad95dd02..9bf33064377b 100644
--- a/tools/testing/selftests/kvm/arm64/get-reg-list.c
+++ b/tools/testing/selftests/kvm/arm64/get-reg-list.c
@@ -42,6 +42,12 @@ struct feature_id_reg {
static struct feature_id_reg feat_id_regs[] = {
REG_FEAT(TCR2_EL1, ID_AA64MMFR3_EL1, TCRX, IMP),
REG_FEAT(TCR2_EL2, ID_AA64MMFR3_EL1, TCRX, IMP),
+ REG_FEAT(GCSPR_EL0, ID_AA64PFR1_EL1, GCS, IMP),
+ REG_FEAT(GCSPR_EL1, ID_AA64PFR1_EL1, GCS, IMP),
+ REG_FEAT(GCSPR_EL2, ID_AA64PFR1_EL1, GCS, IMP),
+ REG_FEAT(GCSCRE0_EL1, ID_AA64PFR1_EL1, GCS, IMP),
+ REG_FEAT(GCSCR_EL1, ID_AA64PFR1_EL1, GCS, IMP),
+ REG_FEAT(GCSCR_EL2, ID_AA64PFR1_EL1, GCS, IMP),
REG_FEAT(PIRE0_EL1, ID_AA64MMFR3_EL1, S1PIE, IMP),
REG_FEAT(PIRE0_EL2, ID_AA64MMFR3_EL1, S1PIE, IMP),
REG_FEAT(PIR_EL1, ID_AA64MMFR3_EL1, S1PIE, IMP),
@@ -486,6 +492,9 @@ static __u64 base_regs[] = {
ARM64_SYS_REG(3, 0, 2, 0, 1), /* TTBR1_EL1 */
ARM64_SYS_REG(3, 0, 2, 0, 2), /* TCR_EL1 */
ARM64_SYS_REG(3, 0, 2, 0, 3), /* TCR2_EL1 */
+ ARM64_SYS_REG(3, 0, 2, 5, 0), /* GCSCR_EL1 */
+ ARM64_SYS_REG(3, 0, 2, 5, 1), /* GCSPR_EL1 */
+ ARM64_SYS_REG(3, 0, 2, 5, 2), /* GCSCRE0_EL1 */
ARM64_SYS_REG(3, 0, 5, 1, 0), /* AFSR0_EL1 */
ARM64_SYS_REG(3, 0, 5, 1, 1), /* AFSR1_EL1 */
ARM64_SYS_REG(3, 0, 5, 2, 0), /* ESR_EL1 */
@@ -502,6 +511,7 @@ static __u64 base_regs[] = {
ARM64_SYS_REG(3, 0, 13, 0, 4), /* TPIDR_EL1 */
ARM64_SYS_REG(3, 0, 14, 1, 0), /* CNTKCTL_EL1 */
ARM64_SYS_REG(3, 2, 0, 0, 0), /* CSSELR_EL1 */
+ ARM64_SYS_REG(3, 3, 2, 5, 1), /* GCSPR_EL0 */
ARM64_SYS_REG(3, 3, 10, 2, 4), /* POR_EL0 */
ARM64_SYS_REG(3, 3, 13, 0, 2), /* TPIDR_EL0 */
ARM64_SYS_REG(3, 3, 13, 0, 3), /* TPIDRRO_EL0 */
@@ -740,6 +750,8 @@ static __u64 el2_regs[] = {
SYS_REG(PIRE0_EL2),
SYS_REG(PIR_EL2),
SYS_REG(POR_EL2),
+ SYS_REG(GCSPR_EL2),
+ SYS_REG(GCSCR_EL2),
SYS_REG(AMAIR_EL2),
SYS_REG(VBAR_EL2),
SYS_REG(CONTEXTIDR_EL2),
--
2.47.2
next prev parent reply other threads:[~2025-09-12 11:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-12 9:25 [PATCH v16 0/6] KVM: arm64: Provide guest support for GCS Mark Brown
2025-09-12 9:25 ` [PATCH v16 1/6] arm64/gcs: Ensure FGTs for EL1 GCS instructions are disabled Mark Brown
2025-09-12 9:25 ` [PATCH v16 2/6] KVM: arm64: Manage GCS access and registers for guests Mark Brown
2025-09-12 11:59 ` Marc Zyngier
2025-09-12 16:33 ` Mark Brown
2025-09-12 17:14 ` Mark Brown
2025-09-12 21:30 ` Marc Zyngier
2025-09-12 9:25 ` [PATCH v16 3/6] KVM: arm64: Set PSTATE.EXLOCK when entering an exception Mark Brown
2025-09-12 9:25 ` [PATCH v16 4/6] KVM: arm64: Validate GCS exception lock when emulating ERET Mark Brown
2025-09-12 12:06 ` Marc Zyngier
2025-09-12 9:25 ` [PATCH v16 5/6] KVM: arm64: Allow GCS to be enabled for guests Mark Brown
2025-09-12 21:44 ` Marc Zyngier
2025-09-12 9:25 ` Mark Brown [this message]
2025-09-12 21:46 ` [PATCH v16 6/6] KVM: selftests: arm64: Add GCS registers to get-reg-list Marc Zyngier
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