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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4909d6a0a89sm68444645e9.7.2026.05.29.09.55.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 May 2026 09:55:17 -0700 (PDT) Date: Fri, 29 May 2026 17:55:16 +0100 From: David Laight To: Jason Gunthorpe Cc: David Matlack , Alex Williamson , kvm@vger.kernel.org, Leon Romanovsky , linux-kselftest@vger.kernel.org, linux-rdma@vger.kernel.org, Mark Bloch , netdev@vger.kernel.org, Saeed Mahameed , Shuah Khan , Tariq Toukan , patches@lists.linux.dev Subject: Re: [PATCH v2 06/11] selftests: Fix arm64 IO barriers to match kernel Message-ID: <20260529175516.06d5788f@pumpkin> In-Reply-To: <20260529134947.GA128816@nvidia.com> References: <0-v2-72e9640932fd+2c64-mlx5st_jgg@nvidia.com> <6-v2-72e9640932fd+2c64-mlx5st_jgg@nvidia.com> <20260529134947.GA128816@nvidia.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Fri, 29 May 2026 10:49:47 -0300 Jason Gunthorpe wrote: > On Thu, May 28, 2026 at 06:13:26PM +0000, David Matlack wrote: > > > Let's put these in tools/arch/arm64/include/asm/io.h so that the tools > > headers are more aligned with the kernel headers, and so that the arm64 > > io.h overrides are done in the same way as the x86 overrides in > > tools/arch/x86/include/asm/io.h. > > > > Something like this (untested): > > Okay, the disassembly says it works: > > 1db8: ca080108 eor x8, x8, x8 > 1dbc: b5000008 cbnz x8, 1dbc > 1dc0: f9000fe8 str x8, [sp, #24] That looks strange, I suspect the C didn't match any usual pattern. Normally 'tmp' would get thrown away and 'v' would get kept. But you seem to have discarded 'v' and written 'tmp' to stack. I'm probably being stupid again, but how does that work? The cpu can speculate straight through the control dependency into the following instructions. An 'eor x1, x8, x8' may not even have a data-dependency on x8. (Most x86 cpus just generate a zero for the equivalent instruction.) -- David > > Jason >