From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-173.mta1.migadu.com (out-173.mta1.migadu.com [95.215.58.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF64942A15D for ; Tue, 7 Jul 2026 14:24:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.173 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783434287; cv=none; b=COC9ronpksfpLOIsy1SY4CksqTT4E2LmEAQ+xtIabGKZ4jzpHL58Dplkg1HT6vURppDDR+NILgUCjms+qxxWYU5+xr5xb70Frxrr1eykXWVfeWScNqzaLaZL3lXa2PB2fe5jZnzVyEk/8NeInQDw9r6qo4joWNtgE4deZ0l5y6A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783434287; c=relaxed/simple; bh=N9iAT2nJOVW7IcRQdfg39n3FdybruoF+l/MZSwlYXbA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TXTReMKl5aHqDU2EC3jTIgcubinfOAODIJUJCk5SWTHkVUOD5kF7238h1p+YGSPE7uQ6Id1neJTz549F19Ff/mZbPuIiiI5aLfnS2xotL1gAPJ3fZGTtOBkdU0QkIlI9lYVMqOHHEZxipMk9xMKGwEsuATEb1bfHkUSHGUfAN9k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=DfqxHamD; arc=none smtp.client-ip=95.215.58.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="DfqxHamD" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1783434272; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2+T/Jggvqz6cZ+zi/SQhTFIKS0RfRSrRiwzkzIBLZwg=; b=DfqxHamDlz5qcPAWYuuHVuYkYYUJwZ96BSHL0ZJrhPEGwqr6ZvD6DuUNw8//aiTXYUKYbz pXgnmUU6kS8cFmiu4vA/Z+2KN//6fnfdJH89gNnoiR4XFd72NE2dyRouZUlX3Id9Pi50JK g0iQ4ZR4nlKToLXxtJXAO4ePYkZWsWY= From: Usama Arif To: Puranjay Mohan Cc: Usama Arif , bpf@vger.kernel.org, Puranjay Mohan , Alexei Starovoitov , Daniel Borkmann , John Fastabend , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , Song Liu , Yonghong Song , Will Deacon , Mark Rutland , Catalin Marinas , Leo Yan , Rob Herring , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , James Clark , Ian Rogers , Adrian Hunter , Shuah Khan , Breno Leitao , Ravi Bangoria , Stephane Eranian , Kumar Kartikeya Dwivedi , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-team@meta.com Subject: Re: [PATCH v5 2/4] perf/core: Clear the whole branch entry in perf_clear_branch_entry() Date: Tue, 7 Jul 2026 07:24:22 -0700 Message-ID: <20260707142424.1687033-1-usama.arif@linux.dev> In-Reply-To: <20260616155716.2631508-3-puranjay@kernel.org> References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT On Tue, 16 Jun 2026 08:57:07 -0700 Puranjay Mohan wrote: > perf_clear_branch_entry_bitfields() resets the bitfields of struct > perf_branch_entry one at a time and deliberately leaves from/to alone, > since callers overwrite those immediately. The list of assignments has to > be kept in sync with the struct by hand, and it has already drifted: > new_type and priv were added to perf_branch_entry but never cleared here, > so stale values can leak into the records handed to userspace. > > Clear the entry with a single struct assignment instead: > > *br = (struct perf_branch_entry){ }; > > Every caller writes from/to right after the clear, so zeroing them as well > is harmless and the dead stores are elided on the x86 LBR read paths. > There is no longer anything to keep in sync when a field is added. > > The helper no longer touches only the bitfields, so rename it to > perf_clear_branch_entry() and update the callers, fixing up the > br+nr/br+out spacing on the touched lines while at it. > > Fixes: b190bc4ac9e6 ("perf: Extend branch type classification") > Fixes: 5402d25aa571 ("perf: Capture branch privilege information") > Suggested-by: James Clark > Signed-off-by: Puranjay Mohan > --- > arch/x86/events/amd/brs.c | 2 +- > arch/x86/events/amd/lbr.c | 2 +- > arch/x86/events/intel/lbr.c | 6 +++--- > drivers/perf/arm_brbe.c | 2 +- > include/linux/perf_event.h | 16 ++-------------- > 5 files changed, 8 insertions(+), 20 deletions(-) > Acked-by: Usama Arif