From: Richard Cheng <icheng@nvidia.com>
To: tony.luck@intel.com, reinette.chatre@intel.com, x86@kernel.org
Cc: Dave.Martin@arm.com, james.morse@arm.com, babu.moger@amd.com,
shuah@kernel.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org, newtonl@nvidia.com,
kristinc@nvidia.com, kobak@nvidia.com, kaihengf@nvidia.com,
fenghuay@nvidia.com, ltrager@nvidia.com,
Richard Cheng <icheng@nvidia.com>
Subject: [PATCH v4 0/3] selftests/resctrl: Fix resctrl selftests issues on aarch64
Date: Wed, 22 Jul 2026 11:59:40 +0800 [thread overview]
Message-ID: <20260722035943.32337-1-icheng@nvidia.com> (raw)
This series fixes numerous issues in the resctrl selftests on aarch64,
where they currently misreport failures.
Patch 1 skips L3_CAT at feature-check time when MPAM legitimately
reports every CBM bit as shareable, instead of failing the test.
Patch 2 adds aarch64 implementations of cl_flush() and sb() in
fill_buf.c so cache flushes are no longer silent no-ops.
Patch 3 teaches detect_vendor() about aarch64 (which exposes no
vendor_id in /proc/cpuinfo) and lets arch_supports_noncont_cat()
return true for ARM, fixing spurious L3_NONCONT_CAT failures.
Changes since v3:
- Patch 2: replace "dc civac" in cl_flush() with a dirty store, per
Ben Horgan's feedback that dc civac only cleans to the Point of
Coherency and does not reach the SLC where MPAM cache portions
are enforced.
- Patch 1, Patch 3: no code changes.
Richard Cheng (3):
selftests/resctrl: Skip L3_CAT when no exclusive cache portion exists
selftests/resctrl: Implement cl_flush() and sb() for aarch64
selftests/resctrl: Recognise aarch64 as a vendor for L3_NONCONT_CAT
tools/testing/selftests/resctrl/cat_test.c | 32 +++++++++++++++++--
tools/testing/selftests/resctrl/fill_buf.c | 11 +++++++
tools/testing/selftests/resctrl/resctrl.h | 1 +
.../testing/selftests/resctrl/resctrl_tests.c | 21 ++++++++++++
4 files changed, 62 insertions(+), 3 deletions(-)
--
2.43.0
next reply other threads:[~2026-07-22 3:59 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-22 3:59 Richard Cheng [this message]
2026-07-22 3:59 ` [PATCH v4 1/3] selftests/resctrl: Skip L3_CAT when no exclusive cache portion exists Richard Cheng
2026-08-12 17:22 ` Reinette Chatre
2026-07-22 3:59 ` [PATCH v4 2/3] selftests/resctrl: Implement cl_flush() and sb() for aarch64 Richard Cheng
2026-08-12 17:25 ` Reinette Chatre
2026-07-22 3:59 ` [PATCH v4 3/3] selftests/resctrl: Recognise aarch64 as a vendor for L3_NONCONT_CAT Richard Cheng
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